ATSAM3S4AA-AU Atmel, ATSAM3S4AA-AU Datasheet - Page 51

• Manufacturer Part Number: ATSAM3S4AA-AU
• Description: IC MCU 32BIT 256KB FLASH 48LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S4AA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 8x10/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 34
• Ram Memory Size: 48KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Package: 48LQFP
• Device Core: ARM Cortex M3
• Family Name: AT91
• Maximum Speed: 64 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 34
• Interface Type: I2C/I2S/SPI/UART/USART/USB
• On-chip Adc: 9-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

12.11 Digital-to-Analog Converter (DAC)
12.12 Static Memory Controller
12.13 Analog Comparator
6500CS–ATARM–24-Jan-11
• Programmable gain: 1, 2, 4
• Up to 2 channel 12-bit DAC
• Up to 2 mega-samples conversion rate in single channel mode
• Flexible conversion range
• Multiple trigger sources for each channel
• 2 Sample/Hold (S/H) outputs
• Built-in offset and gain calibration
• Possibility to drive output to ground
• Possibility to use as input to analog comparator or ADC (as an internal wire and without S/H
• Two PDC channels
• Power reduction mode
• 16-Mbyte Address Space per Chip Select
• 8- bit Data Bus
• Word, Halfword, Byte Transfers
• Programmable Setup, Pulse And Hold Time for Read Signals per Chip Select
• Programmable Setup, Pulse And Hold Time for Write Signals per Chip Select
• Programmable Data Float Time per Chip Select
• External Wait Request
• Automatic Switch to Slow Clock Mode
• Asynchronous Read in Page Mode Supported: Page Size Ranges from 4 to 32 Bytes
• NAND FLASH additional logic supporting NAND Flash with Multiplexed Data/Address buses
• Hardware Configurable number of chip select from 1 to 4
• Programmable timing on a per chip select basis
• One analog comparator
• High speed option vs. low power option
• Selectable input hysteresis:
• Minus input selection:
• Plus input selection:
stage)
– 0, 20 mV, 50 mV
– DAC outputs
– Temperature Sensor
– ADVREF
– AD0 to AD3 ADC channels
– All analog inputs
SAM3S Summary
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