AT89C5132-RORUL Atmel, AT89C5132-RORUL Datasheet - Page 97
![MCU 8051 FLASH USB 80TQFP](/photos/12/13/121358/313-80-tqfp_sml.jpg)
AT89C5132-RORUL
Manufacturer Part Number
AT89C5132-RORUL
Description
MCU 8051 FLASH USB 80TQFP
Manufacturer
Atmel
Series
AT89C513xr
Specifications of AT89C5132-RORUL
Core Processor
C52X2
Core Size
8-Bit
Speed
20MHz
Connectivity
IDE/ATAPI, I²C, MMC, PCM, SPI, UART/USART, USB
Peripherals
I²S, POR, WDT
Number Of I /o
44
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Part Number
Manufacturer
Quantity
Price
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Figure 16-20. MMC Controller Interrupt System
16.8
4173E–USB–09/07
Registers
MMINT.7
MMINT.6
MMINT.5
MMINT.4
MMINT.3
MMINT.2
MMINT.1
MMINT.0
MCBI
EORI
EOCI
EOFI
F2FI
F1FI
F2EI
F1EI
The interrupt request is generated each time an unmasked flag is set, and the global MMC con-
troller interrupt enable bit is set (EMMC in IEN1 register).
Reading the MMINT register automatically clears the interrupt flags (acknowledgment). This
implies that register content must be saved and tested interrupt flag by interrupt flag to be sure
not to overlook any interrupts.
Table 78. MMCON0 Register
MMCON0 (S:E4h) – MMC Control Register 0
Number
DRPTR
MMMSK.6
MMMSK.4
MMMSK.2
MMMSK.0
EORM
Bit
EOFM
F1EM
F1FM
7
7
Mnemonic Description
MMMSK.7
MMMSK.5
MMMSK.3
MMMSK.1
DTPTR
DRPTR
MCBM
EOCM
F2FM
F2EM
Bit
6
Data Receive Pointer Reset Bit
Set to reset the read pointer of the data FIFO.
Clear to release the read pointer of the data FIFO.
CRPTR
5
CTPTR
4
EMMC
IEN1.0
MBLOCK
3
MMC Interface
Interrupt Request
DFMT
2
AT89C5132
RFMT
1
CRCDIS
0
97
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