DSPIC30F2020-20E/SP Microchip Technology, DSPIC30F2020-20E/SP Datasheet - Page 54
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DSPIC30F2020-20E/SP
Manufacturer Part Number
DSPIC30F2020-20E/SP
Description
IC DSPIC MCU/DSP 12K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.AC164335.pdf
(286 pages)
2.DM300023.pdf
(22 pages)
3.DM300023.pdf
(18 pages)
4.DSPIC30F2011-20ISO.pdf
(66 pages)
5.DSPIC30F2011-20IP.pdf
(26 pages)
6.DSPIC30F1010-30ISO.pdf
(26 pages)
7.DSPIC30F1010-30ISO.pdf
(50 pages)
Specifications of DSPIC30F2020-20E/SP
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Core Frequency
15MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
21
Flash Memory Size
12KB
Supply Voltage Range
3V To 5.5V
Package
28SPDIP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM300023 - KIT DEMO DSPICDEM SMPS BUCKDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
12.0
12.1
If it is determined that the programming executive does
not reside in executive memory (as described in
Section 4.0 “Confirming the Contents of Executive
Memory”), it must be programmed into executive
memory using ICSP and the techniques described in
Section 11.0 “ICSP™
TABLE 12-1:
DS70102K-page 54
Step 1: Exit the Reset vector and erase executive memory.
0000
0000
0000
Step 2: Initialize the NVMCON to erase executive memory.
0000
0000
Step 3: Unlock the NVMCON for programming.
0000
0000
0000
0000
Step 4: Initiate the erase cycle.
0000
0000
0000
—
0000
0000
0000
0000
0000
Step 5: Initialize the TBLPAG and the write pointer (W7).
0000
0000
0000
0000
0000
Step 6: Initialize the NVMCON to program 32 instruction words.
0000
0000
Step 7: Load W0:W5 with the next 4 words of packed programming executive code and initialize W6 for
0000
0000
0000
0000
0000
0000
Command
(Binary)
programming. Programming starts from the base of executive memory (0x800000) using W6 as a read
pointer and W7 as a write pointer.
PROGRAMMING THE
PROGRAMMING EXECUTIVE
TO MEMORY
Overview
040100
040100
000000
24072A
883B0A
200558
883B38
200AA9
883B39
A8E761
000000
000000
—
000000
000000
A9E761
000000
000000
200800
880190
EB0380
000000
000000
24001A
883B0A
2<LSW0>0
2<MSB1:MSB0>1
2<LSW1>2
2<LSW2>3
2<MSB3:MSB2>4
2<LSW3>5
(Hexadecimal)
PROGRAMMING THE PROGRAMMING EXECUTIVE
Data
Mode”.
GOTO 0x100
GOTO 0x100
NOP
MOV
MOV
MOV
MOV
MOV
MOV
BSET NVMCON, #15
NOP
NOP
Externally time ‘P13a’ ms (see
Timing
NOP
NOP
BCLR NVMCON, #15
NOP
NOP
MOV
MOV
CLR
NOP
NOP
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
Requirements”)
#0x4072, W10
W10, NVMCON
#0x55, W8
W8, NVMKEY
#0xAA, W9
W9, NVMKEY
#0x80, W0
W0, TBLPAG
W7
#0x4001, W10
W10, NVMCON
#<LSW0>, W0
#<MSB1:MSB0>, W1
#<LSW1>, W2
#<LSW2>, W3
#<MSB3:MSB2>, W4
#<LSW3>, W5
Storing the programming executive to executive
memory is similar to normal programming of code
memory. The executive memory must first be erased,
and then the programming executive must be
programmed 32 words at a time. This control flow is
summarized in
Description
Section 13.0 “AC/DC Characteristics and
Table
12-1.
© 2010 Microchip Technology Inc.