ATMEGA1284P-AUR Atmel, ATMEGA1284P-AUR Datasheet - Page 36

MCU AVR 128KB FLASH 20MHZ 44TQFP

ATMEGA1284P-AUR

Manufacturer Part Number
ATMEGA1284P-AUR
Description
MCU AVR 128KB FLASH 20MHZ 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA1284P-AUR

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA1284P-AUR
Manufacturer:
Atmel
Quantity:
10 000
8272A–AVR–01/10
Ce - is optional external capacitors as described in
Ci - is is the pin capacitance in
CL - is the load capacitance for a 32.768 kHz crystal specified by the crystal vendor.
C
Crystals specifying load capacitance (CL) higher than the ones given in the
35, require external capacitors applied as described in
Figure 8-3.
Crystals specifying load capacitance (CL) higher than listed in
external capacitors applied as described in
To find suitable load capacitance for a 32.768 kHz crysal, please consult the crystal datasheet.
When this oscillator is selected, start-up times are determined by the SUT Fuses and CKSEL0
as shown in
Table 8-9.
Note:
164A/164PA/324A/324PA/644A/644PA/1284/1284P
Power Conditions
BOD enabled
Fast rising power
Slowly rising power
BOD enabled
Fast rising power
Slowly rising power
S
- is the total stray capacitance for one TOSC pin.
1. These options should only be used if frequency stability at start-up is not important for the
application.
Table
Crystal Oscillator Connections
Start-up Times for the Low Frequency Crystal Oscillator Clock Selection
8-9.
Start-up Time from
Power-down and
Table 8-8 on page 35
Reserved
Reserved
Power-save
32K CK
32K CK
32K CK
1K CK
1K CK
1K CK
Figure 8-2 on page
Figure 8-2 on page 32
Additional Delay
14CK + 4.1 ms
14CK + 65 ms
Figure 8-2 on page
14CK + 4.1 ms
14CK + 65 ms
(V
from Reset
CC
14CK
14CK
= 5.0V)
32.
(1)
Table 8-8 on page
(1)
(1)
32.
CKSEL0
Table 8-8 on page
0
0
0
0
1
1
1
1
35, require
SUT1..0
00
01
10
11
00
01
10
11
36

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