ATMEGA1284P-AUR Atmel, ATMEGA1284P-AUR Datasheet - Page 273

MCU AVR 128KB FLASH 20MHZ 44TQFP

ATMEGA1284P-AUR

Manufacturer Part Number
ATMEGA1284P-AUR
Description
MCU AVR 128KB FLASH 20MHZ 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA1284P-AUR

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA1284P-AUR
Manufacturer:
Atmel
Quantity:
10 000
24.6
8272A–AVR–01/10
ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P Boundary-scan Order
Table 24-1
selected as data path. Bit 0 is the LSB; the first bit scanned in, and the first bit scanned out. The
scan order follows the pin-out order as far as possible. Therefore, the bits of Port A and Port K is
scanned in the opposite bit order of the other ports. Exceptions from the rules are the Scan
chains for the analog circuits, which constitute the most significant bits of the scan chain regard-
less of which physical pin they are connected to. In
PXn. Control corresponds to FF1, PXn. Bit 4, 5, 6 and 7 of Port F is not in the scan chain, since
these pins constitute the TAP pins when the JTAG is enabled.
Table 24-1.
164A/164PA/324A/324PA/644A/644PA/1284/1284P
Bit Number
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
shows the Scan order between TDI and TDO when the Boundary-scan chain is
ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P Boundary-scan
Order
Signal Name
PB0.Data
PB0.Control
PB1.Data
PB1.Control
PB2.Data
PB2.Control
PB3.Data
PB3.Control
PB4.Data
PB4.Control
PB5.Data
PB5.Control
PB6.Data
PB6.Control
PB7.Data
PB7.Control
RSTT
Figure
Module
Port B
Reset Logic (Observe Only)
24-3, PXn. Data corresponds to FF0,
273

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