PIC18F45K22-I/P Microchip Technology, PIC18F45K22-I/P Datasheet - Page 254
PIC18F45K22-I/P
Manufacturer Part Number
PIC18F45K22-I/P
Description
MCU 8BIT 32KB FLASH 5.5V 40PDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC18F26J13-ISS.pdf
(496 pages)
3.PIC18F25K22T-ISS.pdf
(10 pages)
Specifications of PIC18F45K22-I/P
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 30x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1536 B
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 28 Channel
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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PIC18(L)F2X/4XK22
15.7
The MSSPx module has a Baud Rate Generator avail-
able for clock generation in both I
modes. The Baud Rate Generator (BRG) reload value
is placed in the SSPxADD register
When a write occurs to SSPxBUF, the Baud Rate Gen-
erator will automatically begin counting down.
Once the given operation is complete, the internal clock
will automatically stop counting and the clock pin will
remain in its last state.
An internal signal “Reload” in
value from SSPxADD to be loaded into the BRG
counter. This occurs twice for each oscillation of the
FIGURE 15-40:
TABLE 15-4:
DS41412D-page 254
Note 1:
Note: Values of 0x00, 0x01 and 0x02 are not valid
Baud Rate Generator
for SSPxADD when used as a Baud Rate
Generator for I
limitation.
32 MHz
32 MHz
32 MHz
16 MHz
16 MHz
16 MHz
4 MHz
The I
100 kHz) in all details, but may be used with care where higher rates are required by the application.
F
OSC
2
C interface does not conform to the 400 kHz I
MSSPx CLOCK RATE W/BRG
BAUD RATE GENERATOR BLOCK DIAGRAM
2
C. This is an implementation
SSPxM<3:0>
Figure 15-39
SCLx
2
C and SPI Master
(Register
8 MHz
8 MHz
8 MHz
4 MHz
4 MHz
4 MHz
1 MHz
SSPxM<3:0>
F
triggers the
CY
Control
Reload
15-6).
SSPxCLK
Preliminary
Reload
2
module clock line. The logic dictating when the reload
signal is asserted depends on the mode the MSSPx is
being operated in.
Table 15-4
instruction cycles and the BRG value loaded into
SSPxADD.
EQUATION 15-1:
C specification (which applies to rates greater than
BRG Down Counter
SSPxADD<7:0>
BRG Value
0Ch
13h
19h
4Fh
09h
27h
09h
F
CLOCK
demonstrates clock rates based on
=
-------------------------------------------------
2010 Microchip Technology Inc.
SSPxADD
F
OSC
(2 Rollovers of BRG)
/2
F
OSC
400 kHz
400 kHz
308 kHz
100 kHz
308 kHz
100 kHz
100 kHz
F
+
CLOCK
1
4
(1)
(1)
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