ATMEGA324PA-CUR Atmel, ATMEGA324PA-CUR Datasheet - Page 221
ATMEGA324PA-CUR
Manufacturer Part Number
ATMEGA324PA-CUR
Description
MCU AVR 32KB FLSH 20 MHZ 49VFBGA
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA324PA-AUR.pdf
(468 pages)
Specifications of ATMEGA324PA-CUR
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Manufacturer
Quantity
Price
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20.7.1
8152G–AVR–11/09
Master Transmitter Mode
In the Master Transmitter mode, a number of data bytes are transmitted to a Slave Receiver
(see
transmitted. The format of the following address packet determines whether Master Transmitter
or Master Receiver mode is to be entered. If SLA+W is transmitted, MT mode is entered, if
SLA+R is transmitted, MR mode is entered. All the status codes mentioned in this section
assume that the prescaler bits are zero or are masked to zero.
Figure 20-11. Data Transfer in Master Transmitter Mode
A START condition is sent by writing the following value to TWCR:
TWEN must be set to enable the 2-wire Serial Interface, TWSTA must be written to one to trans-
mit a START condition and TWINT must be written to one to clear the TWINT Flag. The TWI will
then test the 2-wire Serial Bus and generate a START condition as soon as the bus becomes
free. After a START condition has been transmitted, the TWINT Flag is set by hardware, and the
status code in TWSR will be 0x08 (see
SLA+W must be transmitted. This is done by writing SLA+W to TWDR. Thereafter the TWINT bit
should be cleared (by writing it to one) to continue the transfer. This is accomplished by writing
the following value to TWCR:
When SLA+W have been transmitted and an acknowledgement bit has been received, TWINT is
set again and a number of status codes in TWSR are possible. Possible status codes in Master
mode are 0x18, 0x20, or 0x38. The appropriate action to be taken for each of these status codes
is detailed in
When SLA+W has been successfully transmitted, a data packet should be transmitted. This is
done by writing the data byte to TWDR. TWDR must only be written when TWINT is high. If not,
the access will be discarded, and the Write Collision bit (TWWC) will be set in the TWCR Regis-
ter. After updating TWDR, the TWINT bit should be cleared (by writing it to one) to continue the
transfer. This is accomplished by writing the following value to TWCR:
TWCR
value
TWCR
value
TWCR
value
Figure 20-11 on page
SDA
SCL
Table 20-2 on page
TWINT
TWINT
TWINT
1
1
1
TRANSMITTER
Device 1
MASTER
TWEA
TWEA
TWEA
X
X
X
ATmega164PA/324PA/644PA/1284P
221). In order to enter a Master mode, a START condition must be
Device 2
RECEIVER
SLAVE
222.
TWSTA
TWSTA
TWSTA
1
0
0
Table 20-2 on page
Device 3
TWSTO
TWSTO
TWSTO
0
0
0
........
TWWC
TWWC
TWWC
Device n
X
X
X
222). In order to enter MT mode,
V
CC
TWEN
TWEN
TWEN
1
1
1
R1
R2
–
0
–
0
–
0
TWIE
TWIE
TWIE
X
X
X
221
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