ATMEGA328-MUR Atmel, ATMEGA328-MUR Datasheet - Page 296

• Manufacturer Part Number: ATMEGA328-MUR
• Description: IC MCU AVR 32K FLASH 32QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA328-MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

27. Memory Programming
27.1
8271C–AVR–08/10
Program And Data Memory Lock Bits
T h e
ATmega88A/88PA/168A/168PA/328/328Pprovides six Lock bits. These can be left unpro-
grammed (“1”) or can be programmed (“0”) to obtain the additional features listed in
The Lock bits can only be erased to “1” with the Chip Erase command.
The ATmega 48A/48PA has no separate Boot Loader section, and the SPM instruction is
enabled for the whole Flash if the SELFPRGEN fuse is programmed (“0”). Otherwise the SPM
instruction is disabled.
Table 27-1.
Notes:
Table 27-2.
Notes:
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
BLB12
BLB11
BLB02
BLB01
LB2
LB1
LB Mode
Lock Bit Byte
1
2
3
(2)
(2)
(2)
(2)
1. “1” means unprogrammed, “0” means programmed.
2. Only on ATmega88A/88PA/168A/168PA/328/328P.
1. Program the Fuse bits and Boot Lock bits before programming the LB1 and LB2.
2. “1” means unprogrammed, “0” means programmed
A T m e g a
Memory Lock Bits
Lock Bit Byte
Lock Bit Protection Modes
LB2
1
1
0
4 8 A / 4 8 P A
(1)
LB1
1
0
0
Bit No
7
6
5
4
3
2
1
0
Protection Type
No memory lock features enabled.
Further programming of the Flash and EEPROM is disabled in
Parallel and Serial Programming mode. The Fuse bits are
locked in both Serial and Parallel Programming mode.
Further programming and verification of the Flash and EEPROM
is disabled in Parallel and Serial Programming mode. The Boot
Lock bits and Fuse bits are locked in both Serial and Parallel
Programming mode.
p r o v i d e s
(1)(2)
Description
–
–
Boot Lock bit
Boot Lock bit
Boot Lock bit
Boot Lock bit
Lock bit
Lock bit
t w o
(1)
L o c k
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
b i t s
a n d
Table
(1)
27-2.
t h e
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