PIC24F04KA201T-I/MQ Microchip Technology, PIC24F04KA201T-I/MQ Datasheet - Page 35
PIC24F04KA201T-I/MQ
Manufacturer Part Number
PIC24F04KA201T-I/MQ
Description
IC PIC MCU FLASH 512KX4 20-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.PIC24F04KA201-ISS.pdf
(8 pages)
2.PIC24F04KA201-ISS.pdf
(48 pages)
3.PIC24F04KA201-ISS.pdf
(224 pages)
4.PIC24F04KA201-ISS.pdf
(26 pages)
Specifications of PIC24F04KA201T-I/MQ
Program Memory Type
FLASH
Program Memory Size
4KB (1.375K x 24)
Package / Case
20-QFN
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
18
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24F
Core
PIC
Data Bus Width
16 bit
Data Ram Size
512 B
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC24F04KA201-ISS PDF datasheet
- PIC24F04KA201-ISS PDF datasheet #2
- PIC24F04KA201-ISS PDF datasheet #3
- PIC24F04KA201-ISS PDF datasheet #4
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- Download datasheet (4Mb)
TABLE 4-12:
TABLE 4-13:
TABLE 4-14:
TRISA
PORTA
LATA
ODCA
Legend:
Note
TRISB
PORTB 02CA
LATB
ODCB
Legend:
Note
Legend:
PADCFG1 02FC
Name
Name
File
Name
File
File
1:
2:
3:
1:
02CC
02CE
Addr
02C8
Addr
02C0
02C2
02C4
02C6
Addr
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Bit available only when MCLRE = 0.
Bits are available only when the primary oscillator is disabled (POSCMD1:POSCMD0 = 00); otherwise read as ‘0’.
Bits are available only when the primary oscillator is disabled or EC mode is selected (POSCMD1:POSCMD0 = 00 or 11) and CLKO is disabled (OSCIOFNC = 0); otherwise read as ‘0’.
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
These bits are not implemented on 14-pin devices.
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TRISB15
LATB15
ODB15
Bit 15
RB15
Bit 15
PORTA REGISTER MAP
PORTB REGISTER MAP
PAD CONFIGURATION REGISTER MAP
—
Bit 15
—
—
—
—
TRISB14
LATB14
ODB14
Bit 14
Bit 14
RB14
—
Bit 14
—
—
—
—
TRISB13
Bit 13
LATB13
ODB13
RB13
—
Bit 13
Bit 13
—
—
—
—
(1)
(1)
(1)
(1)
Bit 12
TRISB12
—
LATB12
ODB12
Bit 12
RB12
Bit 12
—
—
—
—
(1)
(1)
(1)
(1)
Bit 11
—
Bit 11
—
—
—
—
Bit 11
—
—
—
—
Bit 10
—
Bit 10
—
—
—
—
Bit 10
—
—
—
—
Bit 9
—
Bit 9
—
—
—
—
TRISB9
LATB9
ODB9
Bit 9
RB9
Bit 8
—
Bit 8
—
—
—
—
TRISB8
LATB8
ODB8
Bit 8
RB8
Bit 7
—
Bit 7
—
—
—
—
TRISB7
LATB7
ODB7
Bit 7
RB7
Bit 6
—
TRISA6
LATA6
ODA6
Bit 6
RA6
Bit 6
Bit 5
—
—
—
—
—
Bit 5
RA5
SMBUSDEL OC1TRIS
—
—
—
Bit 5
(1)
—
—
—
—
Bit 4
TRISA4
LATA4
ODA4
Bit 4
RA4
TRISB4
LATB4
ODB4
Bit 4
RB4
Bit 3
TRISA3
LATA3
ODA3
RA3
Bit 3
Bit 3
—
—
—
—
(2,3)
(2,3)
(2,3)
(2,3)
Bit 2
—
TRISA2
TRISB2
LATA2
ODA2
LATB2
ODB2
RA2
RB2
Bit 2
Bit 2
(2)
(1)
(2)
(2)
(1)
(1)
(2)
(1)
Bit 1
—
TRISB1
TRISA1
LATB1
ODB1
LATA1
ODA1
RB1
Bit 1
RA1
Bit 1
(1)
(1)
(1)
(1)
Bit 0
TRISB0
TRISA0
LATB0
—
ODB
LATA0
ODA0
RB0
Bit 0
RA0
Bit 0
(1)
(1)
(1)
(1)
0
Resets
0000
Resets
Resets
00DF
xxxx
xxxx
0000
All
FFFF
xxxx
xxxx
0000
All
All
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