ATTINY44-20MUR Atmel, ATTINY44-20MUR Datasheet - Page 80
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ATTINY44-20MUR
Manufacturer Part Number
ATTINY44-20MUR
Description
MCU AVR 4KB FLASH 20MHZ 20QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY24-20MU.pdf
(238 pages)
Specifications of ATTINY44-20MUR
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY44-20MUR
Manufacturer:
ATMEL
Quantity:
2 100
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11.9
11.9.1
80
Register Description
ATtiny24/44/84
TCCR0A – Timer/Counter Control Register A
Figure 11-11. Timer/Counter Timing Diagram, Clear Timer on Compare Match mode, with Pres-
• Bits 7:6 – COM0A1, COM0A0: Compare Match Output A Mode
These bits control the Output Compare pin (OC0A) behavior. If one or both of the COM0A1:0
bits are set, the OC0A output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC0A pin
must be set in order to enable the output driver.
When OC0A is connected to the pin, the function of the COM0A1:0 bits depends on the
WGM02:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 11-2.
Table 11-3
TCNTn
(clk
OCRnx
Bit
0x30 (0x50)
Read/Write
Initial Value
(CTC)
OCFnx
clk
clk
COM0A1
I/O
I/O
Tn
/8)
0
0
1
1
shows COM0A1:0 bit functionality when WGM01:0 bits are set to fast PWM mode.
caler (f
COM0A1
Compare Output Mode, non-PWM Mode
R/W
COM0A0
7
0
0
1
0
1
clk_I/O
Table 11-2
TOP - 1
COM0A0
R/W
/8)
6
0
Description
Normal port operation, OC0A disconnected.
Toggle OC0A on Compare Match
Clear OC0A on Compare Match
Set OC0A on Compare Match
shows the COM0A1:0 bit functionality when the WGM02:0 bits
COM0B1
R/W
5
0
COM0B0
TOP
R/W
4
0
TOP
R
3
–
0
BOTTOM
R
2
–
0
WGM01
R/W
1
0
WGM00
R/W
0
0
BOTTOM + 1
8006K–AVR–10/10
TCCR0A
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