DF61543J40FPV Renesas Electronics America, DF61543J40FPV Datasheet - Page 485

IC H8SX/1543 MCU FLASH 144-LQFP

DF61543J40FPV

Manufacturer Part Number
DF61543J40FPV
Description
IC H8SX/1543 MCU FLASH 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1500r
Datasheet

Specifications of DF61543J40FPV

Core Processor
H8SX
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, I²C, SCI, SSU
Peripherals
DMA, Motor Control PWM, PWM, WDT
Number Of I /o
95
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
R0K561582S000BE - KIT DEV RSK H8SX/1582F
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Oscillator Type
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF61543J40FPV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF61543J40FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Note:
Bit
2
1
0
*
Bit Name
TEND
MPB
MPBT
Only 0 can be written, to clear the flag.
Initial
Value
1
0
0
R/W
R
R
R/W
Description
Transmit End
[Setting conditions]
[Clearing conditions]
Stores the multiprocessor bit value in the receive frame.
When the RE bit in SCR is cleared to 0 its previous state
is retained.
Multiprocessor Bit Transfer
Sets the multiprocessor bit value to be added to the
transmit frame.
Multiprocessor Bit
When the TE bit in SCR is 0
When TDRE = 1 at transmission of the last bit of a
transmit character
When 0 is written to TDRE after reading TDRE = 1
When a TXI interrupt request is issued allowing
DMAC to write data to TDR
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure
to read the flag after writing 0 to it.)
Section 12 Serial Communication Interface (SCI)
Rev. 3.00 Sep. 24, 2009 Page 437 of 916
REJ09B0381-0300

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