MC68LK332ACAG16 Freescale Semiconductor, MC68LK332ACAG16 Datasheet - Page 65

• Manufacturer Part Number: MC68LK332ACAG16
• Description: IC MCU 32BIT LV AMASK 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68LK332ACAG16

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 16.78MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Interface Type: QSPI, SCI, UART
• Minimum Operating Temperature: - 40 C
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 16MHz
• No. Of Timers: 16
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Data Ram Size: 2 KB
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 2KB
• # I/os (max): 15
• Number Of Timers - General Purpose: 16
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6.2 Address Map
MC68332
MC68332TS/D
The “Access” column in the QSM address map below indicates which registers are accessible only at
the supervisor privilege level and which can be assigned to either the supervisor or user privilege level,
according to the value of the SUPV bit in the QSMCR.
Y = M111, where M is the logic state of the MM bit in the SIMCR.
Access
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S
S
S
$YFFC20–
$YFFD00–
$YFFD20–
$YFFD40–
$YFFC0A
$YFFC0C
$YFFC0E
$YFFC1A
$YFFC1C
$YFFC1E
$YFFCFF
$YFFC00
$YFFC02
$YFFC04
$YFFC06
$YFFC08
$YFFC10
$YFFC12
$YFFC14
$YFFC16
$YFFC18
$YFFD1F
$YFFD3F
$YFFD4F
Address
Freescale Semiconductor, Inc.
For More Information On This Product,
15
PQS PIN ASSIGNMENT (PQSPAR)
QSM INTERRUPT LEVEL (QILR)
Table 24 QSM Address Map
Go to: www.freescale.com
SPI CONTROL 3 (SPCR3)
NOT USED
QSM MODULE CONFIGURATION (QSMCR)
COMMAND RAM (CR[0:F])
SCI CONTROL 0 (SCCR0)
SCI CONTROL 1 (SCCR1)
SPI CONTROL 0 (SPCR0)
SPI CONTROL 1 (SPCR1)
SPI CONTROL 2 (SPCR2)
TRANSMIT RAM (TR[0:F])
RECEIVE RAM (RR[0:F])
SCI STATUS (SCSR)
QSM TEST (QTEST)
SCI DATA (SCDR)
NOT USED
NOT USED
NOT USED
NOT USED
8 7
QSM INTERRUPT VECTOR (QIVR)
PQS DATA DIRECTION (DDRQS)
PQS DATA (PORTQS)
SPI STATUS (SPSR)
MOTOROLA
0
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