MC68LK332ACAG16 Freescale Semiconductor, MC68LK332ACAG16 Datasheet - Page 50

• Manufacturer Part Number: MC68LK332ACAG16
• Description: IC MCU 32BIT LV AMASK 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68LK332ACAG16

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 16.78MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Interface Type: QSPI, SCI, UART
• Minimum Operating Temperature: - 40 C
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 16MHz
• No. Of Timers: 16
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Data Ram Size: 2 KB
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 2KB
• # I/os (max): 15
• Number Of Timers - General Purpose: 16
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

50
MOTOROLA
TBLSN/TBLUN
1. Privileged instruction.
TBLS/TBLU
Instruction
TRAPcc
TRAPV
SWAP
TRAP
UNLK
TAS
TST
Dym : Dyn, Dn
Dym : Dyn, Dn
<ea>, Dn
<ea>, Dn
#<data>
#<data>
Syntax
Í
none
none
Í
Freescale Semiconductor, Inc.
Dn
An
Table 20 Instruction Set Summary(Continued)
For More Information On This Product,
8, 16, 32
Go to: www.freescale.com
Operand Size
8
8, 16, 32
8, 16, 32
16, 32
none
none
none
16
32
Destination Tested Condition Codes bit 7 of
Destination
Dyn
(Temp
(Dym
Dyn
(Temp
Dym
SSP
SSP
vector address
If cc true, then TRAP exception
If V set, then overflow TRAP exception
Source
An
SP; (SP)
Dym
Dym
2
4
Temp
256)
Dn [7 : 0])
Dn [7 : 0]) / 256
0, to set condition codes
SSP; format/vector offset
SSP; PC
Temp
Temp
Temp
Dn
PC
An, SP
MSW
Operation
Temp
Dn
(SSP); SR
Temp
4
LSW
SP
(SSP);
MC68332TS/D
(SSP);
MC68332