MC68LK332ACAG16 Freescale Semiconductor, MC68LK332ACAG16 Datasheet - Page 22

• Manufacturer Part Number: MC68LK332ACAG16
• Description: IC MCU 32BIT LV AMASK 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68LK332ACAG16

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 16.78MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Interface Type: QSPI, SCI, UART
• Minimum Operating Temperature: - 40 C
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 16MHz
• No. Of Timers: 16
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Data Ram Size: 2 KB
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 2KB
• # I/os (max): 15
• Number Of Timers - General Purpose: 16
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

22
MOTOROLA
Num
E10
E11
E12
E13
E14
E15
NOTES:
E1
E2
E3
E4
E5
E6
E7
E8
E9
1. All AC timing is shown with respect to 20% V
2. When previous bus cycle is not an ECLK cycle, the address may be valid before ECLK goes low.
3. Address access time = t
4. Chip select access time = t
ECLK Low to Address Valid
ECLK Low to Address Hold
ECLK Low to CS Valid (CS Delay)
ECLK Low to CS Hold
CS Negated Width
Read Data Setup Time
Read Data Hold Time
ECLK Low to Data High Impedance
CS Negated to Data Hold (Read)
CS Negated to Data High Impedance
ECLK Low to Data Valid (Write)
ECLK Low to Data Hold (Write)
Address Access Time (Read)
Chip-Select Access Time (Read)
Address Setup Time
(V
DD
and V
Freescale Semiconductor, Inc.
Ecyc
For More Information On This Product,
Characteristic
Ecyc
DDSYN
– t
2
EAD
3
– t
ECSD
= 3.0 to 3.6 Vdc, V
4
Table 8 ECLK Bus Timing
Go to: www.freescale.com
– t
EDSR
– t
EDSR
.
DD
.
and 70% V
SS
= 0 Vdc, T
DD
levels unless otherwise noted.
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
EDDW
EDHW
t
t
ECSD
ECSH
ECSN
EDSR
EDHR
ECDH
EACC
EDHZ
ECDZ
EACS
t
A
EAD
EAH
EAS
= T
L
to T
Min
386
296
H
1/2
15
15
30
30
15
—
—
—
—
—
5
0
)
1
MC68LK332EC16/D
Max
150
60
60
—
—
—
—
—
—
—
—
—
—
1
2
MC68LK332
Unit
t
t
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
cyc
cyc
cyc