MC68LK332ACAG16 Freescale Semiconductor, MC68LK332ACAG16 Datasheet - Page 21

• Manufacturer Part Number: MC68LK332ACAG16
• Description: IC MCU 32BIT LV AMASK 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68LK332ACAG16

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 16.78MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Interface Type: QSPI, SCI, UART
• Minimum Operating Temperature: - 40 C
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 16MHz
• No. Of Timers: 16
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Data Ram Size: 2 KB
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 2KB
• # I/os (max): 15
• Number Of Timers - General Purpose: 16
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MC68LK332
MC68CK331EC16/D
Num
NOTES:
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
1. All AC timing is shown with respect to 20% V
IFETCH/DSI
DSI Input Setup Time
DSI Input Hold Time
DSCLK Setup Time
DSCLK Hold Time
DSO Delay Time
DSCLK Cycle Time
CLKOUT Low to FREEZE Asserted/Negated
CLKOUT High to IFETCH High Impedance
CLKOUT High to IFETCH Valid
DSCLK Low Time
CLKOUT
FREEZE
BKPT/DSCLK
(V
IFETCH/DSI
IPIPE/DSO
CLKOUT
DD
FREEZE
Figure 13 BDM Serial Communication Timing Diagram
and V
Figure 14 BDM Freeze Assertion Timing Diagram
Freescale Semiconductor, Inc.
Table 7 Background Debugging Mode Timing
For More Information On This Product,
Characteristic
DDSYN
B7
B6
= 3.0 to 3.6 Vdc, V
Go to: www.freescale.com
B2
B0
DD
and 70% V
B1
SS
B3
= 0 Vdc, T
DD
B5
levels unless otherwise noted.
B4
B9
Symbol
t
t
DSCCYC
t
t
t
DSCSU
t
t
DSCLO
FRZAN
DSISU
t
DSCH
DSOD
A
DSIH
t
IPZ
t
IP
= T
B6
L
B8
to T
Min
H
15
10
15
10
—
—
—
—
2
1
)
1
68300 BKGD DBM SER COM TIM
Max
25
50
50
50
—
—
—
—
—
—
MOTOROLA
68300 BDM FRZ TIM
Unit
t
t
ns
ns
ns
ns
ns
ns
ns
ns
cyc
cyc
21