M30281F6HP#U9B Renesas Electronics America, M30281F6HP#U9B Datasheet - Page 238
M30281F6HP#U9B
Manufacturer Part Number
M30281F6HP#U9B
Description
IC M16C/28 MCU FLASH 48K 64LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheet
1.M30280F6HPU9.pdf
(425 pages)
Specifications of M30281F6HP#U9B
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
55
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
64-LQFP
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30281F6HP#U9BM30281F6HP#D5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
M30281F6HP#U9BM30281F6HP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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M
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1
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J
Figure 14.39 S
6
0
14.2.3 Functions for Setting an S
C
2
9
0 .
B
2 /
(Example) When “H” selected for S
If the SMi6 bit in SiC register is set to 0 (external clock), the S
when not transferring data. However, when transmitting data consecutively, the last bit (bit 0) value of the
last transmitted data is retained between the sccessive data transmissions. Figure 14.39 shows the
timing chart for setting an S
0
0
8
S
NOTES:
Signal written to
(i = 3, 4)
0
S
OUT
SiTRR register
OUT
4
J
G
1. This diagram applies to the case where the bits in the SiC register are set as follows:
2. S
3. If the SMi6 bit is set to "1" (internal clock) or if the SMi2 bit is set to "1" (S
7
a
i pin output
SiC register is set to "0" (transmit data output at the falling edge of the transfer clock) or
in the low state if the SMi4 bit is set to "1" (transmit data output at the rising edge of the
transfer clock).
this output goes to the high-impedance state.
o r
i (internal)
0 -
. n
OUT
SMi7 bit
SMi3 bit
SMi2=0 (S
2
u
3
i can only be initialized when input on the CLKi pin is in the high state if the SMi4bit in the
0
p
, 1
0
(
M
2
0
OUT
OUT
1
0
6
(2)
initial value to “H”
7
Port output
Setting the S
i output), SMi5=0 (LSB first) and SMi6=0 (external clock)
C
i Initial Value Setting
2 /
page 216
, 8
M
OUT
1
6
OUT
i
C
Port selection switching
(I/O port
OUTi
f o
2 /
i initial value
8
3
) B
8
Initial value = “H”
5
initial value and how to set it.
S
OUT
(1)
i)
OUT
(3)
i Initial Value
OUT
D0
D0
output disabled),
OUTi
pin output level can be fixed high or low
(S
output and starting of transmission/
(S
Setting of the initial value of S
OUT
OUT
Serial transmit/reception starts
Write to the SiTRR register
(S
i pin functions as S
i pin functions as an I/O port)
Set the SMi3 bit to “0”
Set the SMi7 bit to “1”
Set the SMi3 bit to “1”
OUT
i initial value = “H”)
reception
“H” level is output
from the S
OUT
i output)
OUT
OUT
14. Serial I/O
i pin
i
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