MC705P6ACDWE Freescale Semiconductor, MC705P6ACDWE Datasheet - Page 77

IC MCU 176 BYTES RAM 28-SOIC

MC705P6ACDWE

Manufacturer Part Number
MC705P6ACDWE
Description
IC MCU 176 BYTES RAM 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC705P6ACDWE

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SIO
Peripherals
POR, WDT
Number Of I /o
21
Program Memory Size
4.5KB (4.5K x 8)
Program Memory Type
OTP
Ram Size
176 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
HC705P
Core
HC05
Data Bus Width
8 bit
Data Ram Size
176 B
Maximum Clock Frequency
2.1 MHz
Number Of Programmable I/os
21
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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0
13.4 Instruction Set Summary
Table 13-6
the condition code register.
Freescale Semiconductor
ADC #opr
ADC opr
ADC opr
ADC opr,X
ADC opr,X
ADC ,X
ADD #opr
ADD opr
ADD opr
ADD opr,X
ADD opr,X
ADD ,X
AND #opr
AND opr
AND opr
AND opr,X
AND opr,X
AND ,X
ASL opr
ASLA
ASLX
ASL opr,X
ASL ,X
ASR opr
ASRA
ASRX
ASR opr,X
ASR ,X
BCC rel
BCLR n opr
BCS rel
BEQ rel
BHCC rel
BHCS rel
BHI rel
BHS rel
Source
Form
is an alphabetical list of all M68HC05 instructions and shows the effect of each instruction on
Add with Carry
Add without Carry
Logical AND
Arithmetic Shift Left (Same as LSL)
Arithmetic Shift Right
Branch if Carry Bit Clear
Clear Bit n
Branch if Carry Bit Set (Same as BLO)
Branch if Equal
Branch if Half-Carry Bit Clear
Branch if Half-Carry Bit Set
Branch if Higher
Branch if Higher or Same
Table 13-6. Instruction Set Summary (Sheet 1 of 6)
Operation
MC68HC705P6A Advance Information Data Sheet, Rev. 2.1
PC ← (PC) + 2 + rel ? C ∨ Z = 0 — — — — —
PC ← (PC) + 2 + rel ? C = 0
PC ← (PC) + 2 + rel ? C = 1
PC ← (PC) + 2 + rel ? H = 0
PC ← (PC) + 2 + rel ? H = 1
PC ← (PC) + 2 + rel ? C = 0
PC ← (PC) + 2 + rel ? Z = 1
C
A ← (A) + (M) + (C)
b7
b7
Description
A ← (A) ∧ (M)
A ← (A) + (M)
Mn ← 0
b0
b0
0
C
— —
— —
— —
— — — — —
— — — — —
— — — — —
— — — — —
— — — — —
— — — — —
— — — — —
H I N Z C
on CCR
Effect
Instruction Set Summary
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
IMM
EXT
IMM
EXT
IMM
EXT
REL
REL
REL
REL
REL
REL
REL
DIR
DIR
DIR
DIR
INH
INH
DIR
INH
INH
IX2
IX1
IX2
IX1
IX2
IX1
IX1
IX1
IX
IX
IX
IX
IX
CB
DB
C9
D9
AB
BB
EB
FB
C4
D4
1D
A9
B9
E9
F9
A4
B4
E4
F4
38
48
58
68
78
37
47
57
67
77
24
11
13
15
17
19
1B
1F
25
27
28
29
22
24
hh ll
ee ff
hh ll
ee ff
hh ll
ee ff
dd
dd
dd
dd
dd
dd
dd
dd
dd
dd
dd
dd
dd
rr
rr
rr
rr
rr
rr
rr
ff
ff
ff
ff
ff
ii
ii
ii
77
2
3
4
5
4
3
2
3
4
5
4
3
2
3
4
5
4
3
5
3
3
6
5
5
3
3
6
5
3
5
5
5
5
5
5
5
5
3
3
3
3
3
3