C8051F704-GM Silicon Laboratories Inc, C8051F704-GM Datasheet - Page 239
C8051F704-GM
Manufacturer Part Number
C8051F704-GM
Description
IC 8051 MCU 15K FLASH 48-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F70xr
Specifications of C8051F704-GM
Program Memory Type
FLASH
Program Memory Size
15KB (15K x 8)
Package / Case
48-QFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Cap Sense, POR, PWM, Temp Sensor, WDT
Number Of I /o
39
Eeprom Size
32 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F7x
Core
8051
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
39
Number Of Timers
4 x 16 bit
Operating Supply Voltage
1.8 V to 3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F700DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1635 - DEV KIT FOR C8051F700
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1610-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F704-GM
Manufacturer:
Silicon Laboratories Inc
Quantity:
135
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Table 30.6. SMBus Status Decoding: Hardware ACK Enabled (EHACK = 1) (Continued)
1000
0100
0101 0 X X
Values Read
0
0
0
0
0
0
0
0
0
1 X
1
0
0
1
A master data byte was
received; ACK sent.
A master data byte was
received; NACK sent (last
byte).
A slave byte was transmitted;
NACK received.
A slave byte was transmitted;
ACK received.
A Slave byte was transmitted;
error detected.
An illegal STOP or bus error
was detected while a Slave
Transmission was in progress.
Current SMbus State
Rev. 1.0
Set ACK for next data byte;
Read SMB0DAT.
Set NACK to indicate next data
byte as the last data byte;
Read SMB0DAT.
Initiate repeated START.
Switch to Master Transmitter
Mode (write to SMB0DAT before
clearing SI).
Read SMB0DAT; send STOP.
Read SMB0DAT; Send STOP
followed by START.
Initiate repeated START.
Switch to Master Transmitter
Mode (write to SMB0DAT before
clearing SI).
No action required (expecting
STOP condition).
Load SMB0DAT with next data
byte to transmit.
No action required (expecting
Master to end transfer).
Clear STO.
Typical Response Options
C8051F70x/71x
Values to
0
0
0
1
0
1
1
0
0
0
0
0
Write
0 1
0 0
0 0
0 X 1100
1 0
1 0
0 0
0 X 1100
0 X 0001
0 X 0100
0 X 0001
0 X
1000
1000
1110
1110
1110
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239
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