MC908QY8CDWE Freescale Semiconductor, MC908QY8CDWE Datasheet - Page 58

• Manufacturer Part Number: MC908QY8CDWE
• Description: IC MCU 8BIT 8K FLASH 16-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908QY8CDWE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Processor Series: HC08QY
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 2
• Operating Supply Voltage: 3 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Configuration Register (CONFIG)
IRQPUD — IRQ Pin Pullup Control Bit
IRQEN — IRQ Pin Function Selection Bit
ESCIBDSRC — ESCI Baud Rate Clock Source Bit
OSCENINSTOP— Oscillator Enable in Stop Mode Bit
RSTEN — RST Pin Function Selection
COPRS (Out of Stop Mode) — COP Reset Period Selection Bit
COPRS (In Stop Mode) — Auto Wakeup Period Selection Bit, depends on OSCSTOPEN in
CONFIG2 and external clock source
LVISTOP — LVI Enable in Stop Mode Bit
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ESCIBDSRC controls the clock source used for the ESCI. The setting of the bit affects the frequency
at which the ESCI operates.
OSCENINSTOP, when set, will allow the clock source to continue to generate clocks in stop mode.
This function can be used to keep the auto-wakeup running while the rest of the microcontroller stops.
When clear, the clock source is disabled when the microcontroller enters stop mode.
When the LVIPWRD bit is clear, setting the LVISTOP bit enables the LVI to operate during stop mode.
Reset clears LVISTOP.
1 = Internal pullup is disconnected
0 = Internal pullup is connected between IRQ pin and V
1 = Interrupt request function active in pin
0 = Interrupt request function inactive in pin
1 = Internal data bus clock used as clock source for ESCI
0 = BUSCLKX4 used as clock source for ESCI
1 = Oscillator enabled to operate during stop mode
0 = Oscillator disabled during stop mode
1 = Reset function active in pin
0 = Reset function inactive in pin
1 = COP reset short cycle = 8176 × BUSCLKX4
0 = COP reset long cycle = 262,128 × BUSCLKX4
1 = Auto wakeup short cycle = 512 × (INTRCOSC or BUSCLKX4)
0 = Auto wakeup long cycle = 16,384 × (INTRCOSC or BUSCLKX4)
1 = LVI enabled during stop mode
0 = LVI disabled during stop mode
Reset:
Read:
Write:
The RSTEN bit is cleared by a power-on reset (POR) only. Other resets will
leave this bit unaffected.
POR:
U = Unaffected
COPRS
Bit 7
0
0
Figure 5-2. Configuration Register 1 (CONFIG1)
LVISTOP
6
0
0
MC68HC908QB8 Data Sheet, Rev. 3
LVIRSTD
5
0
0
LVIPWRD
NOTE
4
0
0
LVITRIP
U
3
0
DD
SSREC
2
0
0
STOP
1
0
0
Freescale Semiconductor
COPD
Bit 0
0
0