C8051F829-GS Silicon Laboratories Inc, C8051F829-GS Datasheet - Page 130
C8051F829-GS
Manufacturer Part Number
C8051F829-GS
Description
IC MCU 8BIT 8KB FLASH 16SOIC
Manufacturer
Silicon Laboratories Inc
Series
C8051F82xr
Datasheet
1.C8051F800DK.pdf
(250 pages)
Specifications of C8051F829-GS
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (3.9mm Width)
Processor Series
C8051F8x
Core
8051
Data Bus Width
16 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
13
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F800DK
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
336-1809-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F829-GS
Manufacturer:
Silicon Laboratories Inc
Quantity:
135
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C8051F80x-83x
SFR Definition 22.1. CLKSEL: Clock Select
SFR Address = 0xA9
130
Name
Reset
6:4
2:0 CLKSEL[2:0] System Clock Select.
Bit
Type
7
3
Bit
CLKRDY
CLKDIV
Unused
CLKRDY
Name
R
7
0
System Clock Divider Clock Ready Flag.
0: The selected clock divide setting has not been applied to the system clock.
1: The selected clock divide setting has been applied to the system clock.
System Clock Divider Bits.
Selects the clock division to be applied to the selected source (internal or external).
000: Selected clock is divided by 1.
001: Selected clock is divided by 2.
010: Selected clock is divided by 4.
011: Selected clock is divided by 8.
100: Selected clock is divided by 16.
101: Selected clock is divided by 32.
110: Selected clock is divided by 64.
111: Selected clock is divided by 128.
Read = 0b. Must write 0b.
Selects the oscillator to be used as the undivided system clock source.
000: Internal Oscillator
001: External Oscillator
All other values reserved.
R/W
6
0
CLKDIV[2:0]
R/W
5
0
Rev. 1.0
R/W
4
0
Function
R
3
0
R/W
2
0
CLKSEL[2:0]
R/W
1
0
R/W
0
0
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