C8051T632-GM Silicon Laboratories Inc, C8051T632-GM Datasheet - Page 18

• Manufacturer Part Number: C8051T632-GM
• Description: IC MCU 4KB 20PIN QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051T63xr

Specifications of C8051T632-GM

• Program Memory Type: OTP
• Program Memory Size: 4KB (4K x 8)
• Package / Case: 20-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051T6x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051T630DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• On-chip Dac: 16-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1464 - KIT DEV FOR C8051T630 FAMILY
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1460-5

C8051T630/1/2/3/4/5
3. Pin Definitions
Table 3.1. Pin Definitions for the C8051T630/1/2/3/4/5
18
Name
V
GND
RST/
C2CK
P2.0/
C2D
P0.0/
VREF
P0.1
IDA0
P0.2/
V
P0.3/
EXTCLK
P0.4
P0.5
P0.6/
CNVSTR
DD
PP
Pin
3
2
4
5
1
20
19
18
17
16
15
Type
D I/O
D I/O
D I/O
D I/O
D I/O or
A In
A In
D I/O or
A In
AOut
D I/O or
A In
A In
D I/O or
A In
A I/O or
D In
D I/O or
A In
D I/O or
A In
D I/O or
A In
D In
Description
Power Supply Voltage.
Ground.
Device Reset. Open-drain output of internal POR or V
external source can initiate a system reset by driving this pin low for at
least 10 µs.
Clock signal for the C2 Debug Interface.
Port 2.0.
Bi-directional data signal for the C2 Debug Interface.
Port 0.0.
External VREF input.
Port 0.1.
IDA0 Output.
Port 0.2.
V
Port 0.3.
External Clock Pin. This pin can be used as the external clock input for
CMOS, capacitor, or RC oscillator configurations.
Port 0.4.
Port 0.5.
Port 0.6.
ADC0 External Convert Start or IDA0 Update Source Input.
PP
Programming Supply Voltage
Rev. 1.0
DD
monitor. An