Z8F1233QH020SG Zilog, Z8F1233QH020SG Datasheet - Page 41

IC ENCORE XP MCU FLSH 12K 20QFN

Z8F1233QH020SG

Manufacturer Part Number
Z8F1233QH020SG
Description
IC ENCORE XP MCU FLSH 12K 20QFN
Manufacturer
Zilog
Series
Encore!®r
Datasheets

Specifications of Z8F1233QH020SG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Other names
269-4656

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F1233QH020SG
Manufacturer:
Zilog
Quantity:
670
PS025111-1207
Reset or Stop Mode Recovery Event
Power-on reset
Reset using RESET pin assertion
Reset using Watchdog Timer time-out
Reset using the On-Chip Debugger (OCTCTL[1] set to 1)
Reset from STOP mode using DBG pin driven Low
Stop Mode Recovery using GPIO pin transition
Stop Mode Recovery using WDT time-out
POR—Power-On Reset indicator
This bit is set to 1 if a Power-On Reset event occurs and is reset to 0, if a WDT time-out or
Stop Mode Recovery occurs. Reading this register also reset this bit to 0.
STOP—Stop Mode Recovery indicator
This bit is set to 1 if a Stop Mode Recovery occurs. If the STOP and WDT bits are both set
to 1, the Stop Mode Recovery occurs because of a WDT time-out. If the STOP bit is 1 and
the WDT bit is 0, the Stop Mode Recovery is not caused by a WDT time-out. This bit is
reset by a Power-on reset or a WDT time-out that occurred while not in STOP mode.
Reading this register also resets this bit.
WDT—Watchdog Timer time-out indicator
This bit is set to 1 if a WDT time-out occurs. A Power-On Reset resets this pin. A Stop
Mode Recovery from a change in an input pin also resets this bit. Reading this register
resets this bit. This read must occur before clearing the WDT interrupt.
EXT—External reset indicator
If this bit is set to 1, a reset initiated by the external RESET pin occurred. A Power-On
Reset or a Stop Mode Recovery from a change in an input pin resets this bit. Reading this
register resets this bit.
Reserved—Must be 0.
POR
1
0
0
1
1
0
0
Z8 Encore!
Reset and Stop Mode Recovery
STOP
Product Specification
0
0
0
0
0
1
1
®
WDT
F0830 Series
0
0
1
0
0
0
1
EXT
0
1
0
0
0
0
0
31

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