DSPIC30F3010-20I/ML Microchip Technology, DSPIC30F3010-20I/ML Datasheet - Page 221
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DSPIC30F3010-20I/ML
Manufacturer Part Number
DSPIC30F3010-20I/ML
Description
IC DSPIC MCU/DSP 24K 44QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F3010-30ISO.pdf
(228 pages)
2.DSPIC30F3010-30ISO.pdf
(18 pages)
3.DSPIC30F3010-30ISO.pdf
(6 pages)
4.DSPIC30F3010-30ISO.pdf
(16 pages)
5.DSPIC30F3010-30ISO.pdf
(22 pages)
6.DSPIC30F3010-20ISP.pdf
(226 pages)
Specifications of DSPIC30F3010-20I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
20
Flash Memory Size
24KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44QFN4 - SOCKET TRANS ICE 28DIP TO 44QFNAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F301020IML
Initialization Condition for RCON Register Case 2 ........... 144
Input Capture (CAPx) Timing Characteristics ................... 183
Input Capture Interrupts ...................................................... 81
Input Capture Module ......................................................... 79
Input Capture Timing Requirements ................................. 183
Input Change Notification Module ....................................... 63
Instruction Addressing Modes............................................. 37
Instruction Set Summary................................................... 149
Internal Clock Timing Examples ....................................... 175
Internet Address................................................................ 219
Interrupt Controller
Interrupt Priority
Interrupt Sequence ............................................................. 47
Interrupts ............................................................................. 43
L
Load Conditions ................................................................ 172
M
Memory Organization.......................................................... 25
Microchip Internet Web Site .............................................. 219
Modulo Addressing ............................................................. 38
Motor Control PWM Module................................................ 93
MPLAB ASM30 Assembler, Linker, Librarian ................... 160
MPLAB Integrated Development Environment Software .. 159
MPLAB PM3 Device Programmer .................................... 162
MPLAB REAL ICE In-Circuit Emulator System................. 161
MPLINK Object Linker/MPLIB Object Librarian ................ 160
O
OCx/PWM Module Timing Characteristics........................ 184
Operating Current (I
Oscillator
Oscillator Configurations ................................................... 138
Oscillator Selection ........................................................... 135
Oscillator Start-up Timer
© 2010 Microchip Technology Inc.
Register Map............................................................... 82
In CPU Sleep Mode .................................................... 80
Simple Capture Event Mode ....................................... 80
Register Map (Bits 7-0) ............................................... 63
File Register Instructions ............................................ 37
Fundamental Modes Supported.................................. 37
MAC Instructions......................................................... 38
MCU Instructions ........................................................ 37
Move and Accumulator Instructions............................ 38
Other Instructions........................................................ 38
Register Map............................................................... 48
Traps........................................................................... 45
Interrupt Stack Frame ................................................. 47
Applicability ................................................................. 40
Operation Example ..................................................... 39
Start and End Address................................................ 39
W Address Register Selection .................................... 39
Fault Timing Characteristics ..................................... 185
Timing Characteristics .............................................. 185
Timing Requirements................................................ 185
Operating Modes (Table) .......................................... 136
Fail-Safe Clock Monitor............................................. 140
Fast RC (FRC) .......................................................... 139
Initial Clock Source Selection ................................... 138
Low-Power RC (LPRC)............................................. 139
LP Oscillator Control ................................................. 139
Phase Locked Loop (PLL) ........................................ 139
Start-up Timer (OST) ................................................ 138
Timing Characteristics .............................................. 178
Timing Requirements................................................ 178
DD
)..................................................... 166
Output Compare Interrupts ................................................. 85
Output Compare Mode
Output Compare Module .................................................... 83
Output Compare Operation During CPU Idle Mode ........... 85
Output Compare Sleep Mode Operation ............................ 85
P
Packaging ......................................................................... 203
Pinout Descriptions
PLL Clock Timing Specifications ...................................... 174
POR. See Power-on Reset.
Port Write/Read Example ................................................... 60
Position Measurement Mode .............................................. 89
Power-Down Current (I
Power-on Reset (POR)..................................................... 135
Power-Saving Modes........................................................ 145
Power-Saving Modes (Sleep and Idle) ............................. 135
Power-up Timer
Program Address Space..................................................... 25
Program and EEPROM Characteristics............................ 171
Program Counter ................................................................ 18
Program Data Table Access............................................... 28
Program Space Visibility
Programmable .................................................................. 135
Programmable Digital Noise Filters .................................... 89
Programmer’s Model .......................................................... 18
Programming Operations.................................................... 51
PWM
PWM Duty Cycle Comparison Units ................................... 97
PWM Fault Pins ................................................................ 100
dsPIC30F3010/3011
Register Map .............................................................. 86
Timing Characteristics .............................................. 183
Timing Requirements ............................................... 183
Details....................................................................... 204
Marking..................................................................... 203
dsPIC30F3010............................................................ 14
dsPIC30F3011............................................................ 12
Oscillator Start-up Timer (OST)................................ 135
Power-up Timer (PWRT) .......................................... 135
Idle............................................................................ 146
Sleep ........................................................................ 145
Timing Characteristics .............................................. 178
Timing Requirements ............................................... 178
Construction ............................................................... 26
Data Access From Program Memory
Data Access from, Address Generation ..................... 26
Memory Map............................................................... 25
Table Instructions
Window into Program Space Operation ..................... 29
Diagram ...................................................................... 19
Algorithm for Program Flash....................................... 51
Erasing a Row of Program Memory ........................... 51
Initiating the Programming Sequence ........................ 52
Loading Write Latches................................................ 52
Register Map ............................................................ 102
Duty Cycle Register Buffers ....................................... 97
Enable Bits ............................................................... 100
Fault States .............................................................. 100
Modes....................................................................... 100
Using Table Instructions ..................................... 27
TBLRDH ............................................................. 27
TBLRDL.............................................................. 27
TBLWTH............................................................. 27
TBLWTL ............................................................. 27
Cycle-by-Cycle ................................................. 100
Latched............................................................. 100
PD
)................................................ 168
DS70141F-page 221