MCF5249LAG120 Freescale Semiconductor, MCF5249LAG120 Datasheet - Page 6
MCF5249LAG120
Manufacturer Part Number
MCF5249LAG120
Description
IC MPU 32BIT COLDF 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCF524xr
Datasheets
1.MCF5249LAG120.pdf
(2 pages)
2.MCF5249LAG120.pdf
(454 pages)
3.MCF5249LAG120.pdf
(16 pages)
4.MCF5249LAG120.pdf
(1 pages)
5.MCF5249LAG120.pdf
(8 pages)
Specifications of MCF5249LAG120
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
120MHz
Connectivity
I²C, IDE, MMC, SPI, UART/USART
Peripherals
DMA, I²S, POR, Serial Audio, WDT
Number Of I /o
34
Program Memory Type
ROMless
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 4x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
144-LQFP
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
120MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.8V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Maximum Clock Frequency
120 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Program Memory Size
8KB
Cpu Speed
120MHz
Embedded Interface Type
I2C, QSPI, UART
Digital Ic Case Style
LQFP
No. Of Pins
144
Rohs Compliant
Yes
For Use With
M5249C3 - KIT EVAL FOR M5249 W/ETHERNET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5249LAG120
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MCF5249LAG120
Manufacturer:
FREESCALE
Quantity:
20 000
160 MAPBGA Ball Assignments
1.4
The following signals are not available on the 144 QFP package.
6
•
•
•
•
•
•
Dual I
— Interchip bus interface for EEPROMs, LCD controllers, A/D converters, keypads
— Master and slave modes, support for multiple masters
— Automatic interrupt generation with programmable level
System debug support
— Real-time instruction trace for determining dynamic execution path
— Background debug mode (BDM) for debug features while halted
— Debug exception processing capability
— Real-time debug support
System Interface
— Glueless bus interface and DRAMC support for interface to 16-bit for DRAM, SRAM, ROM,
— Two programmable chip-select signals for static memories or peripherals with programmable
— Two dedicated chip selects for 16-bit wide DRAM/SDRAM.
— Two dedicated chip selects (CS2 and CS3) are used for the IDE and/or SmartMedia interface
— Programmable interrupt controller (low interrupt latency, eight external interrupt requests,
— 44 programmable general-purpose inputs (for the 160 MAPBGA package)
— 46 programmable general-purpose outputs (for the 160 MAPBGA package)
— IEEE 1149.1 Test (JTAG) Module
Clocking
— Clock-multiplied PLL, programmable frequency
1.8V core, 3.3V I/O
160 pin MAPBGA package (qualified at 140 MHz) and 144 pin QFP package (qualified at 120
MHz)
160 MAPBGA Ball Assignments
FLASH, and I/O devices
wait states and port sizes.
CS0 is active after reset to provide boot-up from external FLASH/ROM.
programmable autovector generator)
2
C Interfaces
The 144 QFP part is qualified for 120 MHz operation. The 160 MAPBGA
part is qualified for 140 MHz.
MCF5249 Integrated ColdFire® Microprocessor Product Brief
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
NOTE
MOTOROLA