R5F21256SNFP#U0 Renesas Electronics America, R5F21256SNFP#U0 Datasheet - Page 436
R5F21256SNFP#U0
Manufacturer Part Number
R5F21256SNFP#U0
Description
IC R8C MCU FLASH 32K 52LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Datasheets
1.R5F211A2SPU0.pdf
(300 pages)
2.R5F21246SDFPU0.pdf
(61 pages)
3.R5F21246SDFPU0.pdf
(527 pages)
Specifications of R5F21256SNFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
52-LQFP
For Use With
R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21256SNFP#U0R5F21256SNFP#ES
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
19.4.4
Table 19.5
D0 to D7: Indicate the data bus which is read when the read status register command is executed.
Bits FMR07 (SR5) to FMR06 (SR4) are set to 0 by executing the clear status register command.
When the FMR07 bit (SR5) or FMR06 bit (SR4) is set to 1, the program and block erase commands cannot
be accepted.
Status Register Bit
SR0 (D0)
SR1 (D1)
SR2 (D2)
SR3 (D3)
SR4 (D4)
SR5 (D5)
SR6 (D6)
SR7 (D7)
19.4.4.1
19.4.4.2
19.4.4.3
The status register indicates the operating status of the flash memory and whether an erase or program operation
has completed normally or in error. Status of the status register can be read by bits FMR00, FMR06, and
FMR07 in the FMR0 register.
Table 19.5 lists the Status Register Bits.
In EW0 mode, the status register can be read in the following cases:
The sequencer status bits indicate the operating status of the flash memory. SR7 is set to 0 (busy) during auto-
programming and auto-erasure, and is set to 1 (ready) at the same time the operation completes.
Refer to 19.4.5 Full Status Check.
Refer to 19.4.5 Full Status Check.
• When a given address in the user ROM area is read after writing the read status register command
• When a given address in the user ROM area is read after executing program or block erase command but
Feb 29, 2008
before executing the read array command.
Status Registers
Sequencer Status (Bits SR7 and FMR00)
Erase Status (Bits SR5 and FMR07)
Program Status (Bits SR4 and FMR06)
Status Register Bits
−
−
−
−
FMR06
FMR07
−
FMR00
FMR0 Register
Page 417 of 485
Bit
Reserved
Reserved
Reserved
Reserved
Program status Completed
Erase status
Reserved
Sequencer
status
Status Name
−
−
−
−
normally
Completed
normally
−
Busy
0
Description
−
−
−
−
Error
Error
−
Ready
1
−
−
−
−
0
0
−
1
19. Flash Memory
Value after
Reset
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