PIC18F8493-I/PT Microchip Technology, PIC18F8493-I/PT Datasheet - Page 38
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PIC18F8493-I/PT
Manufacturer Part Number
PIC18F8493-I/PT
Description
IC PIC MCU FLASH 8KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F6393-IPT.pdf
(62 pages)
2.PIC18F6393-IPT.pdf
(8 pages)
3.PIC18F6393-IPT.pdf
(58 pages)
Specifications of PIC18F8493-I/PT
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
Number Of I /o
66
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
No. Of I/o's
66
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
AUSART, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
66
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136, DM163030
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM163030 - KIT DEV PICDEM LCD2XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F8493-I/PT
Manufacturer:
MAXIM
Quantity:
872
Company:
Part Number:
PIC18F8493-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F8493-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F6393/6493/8393/8493
2.4
The selection of the automatic acquisition time and A/D
conversion clock is determined in part by the clock
source and frequency while in a power-managed mode.
If the A/D is expected to operate while the device is in
a power-managed mode, the ADCS2:ADCS0 bits in
ADCON2 should be updated in accordance with the
clock source to be used. The ACQT2:ACQT0 bits do
not need to be adjusted as the ADCS2:ADCS0 bits
adjust the T
ing the mode, an A/D acquisition or conversion may be
started. Once started, the device should continue to be
clocked by the same clock source until the conversion
has been completed.
If desired, the device may be placed into the
corresponding Idle mode during the conversion. If the
device clock frequency is less than 1 MHz, the A/D RC
clock source should be selected.
Operation in Sleep mode requires the A/D F
be selected. If the ACQT2:ACQT0 bits are set to ‘000’
and a conversion is started, the conversion will be
delayed one instruction cycle to allow execution of the
SLEEP instruction and entry to Sleep mode. The IDLEN
bit (OSCCON<7>) must have already been cleared
prior to starting the conversion.
DS39896A-page 36
Operation in Power-Managed
Modes
AD
time for the new clock speed. After enter-
RC
clock to
Preliminary
2.5
The ADCON1, TRISA, TRISF and TRISH registers all
configure the A/D port pins. The port pins needed as
analog inputs must have their corresponding TRIS bits
set (input). If the TRIS bit is cleared (output), the digital
output level (V
The A/D operation is independent of the state of the
CHS3:CHS0 bits and the TRIS bits.
Note 1: When reading the PORT register, all pins
2: Analog levels on any pin defined as a dig-
Configuring Analog Port Pins
configured as analog input channels will
read as cleared (a low level). Analog con-
version on pins configured as digital pins
can be performed. The voltage on the pin
will be accurately converted.
ital input may cause the digital input buffer
to consume current out of the device’s
specification limits.
OH
or V
OL
© 2007 Microchip Technology Inc.
) will be converted.