PIC16F873-20/SP Microchip Technology, PIC16F873-20/SP Datasheet - Page 118
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PIC16F873-20/SP
Manufacturer Part Number
PIC16F873-20/SP
Description
IC MCU FLASH 4KX14 EE 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F873-04SO.pdf
(218 pages)
4.PIC16F873-04SO.pdf
(5 pages)
5.PIC16F873-04SO.pdf
(5 pages)
6.PIC16F873-04SO.pdf
(4 pages)
Specifications of PIC16F873-20/SP
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Eeprom Size
128 x 8
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
192 B
Interface Type
MSSP/PSP/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
0 C
On-chip Adc
5-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F873-20/SP
Manufacturer:
MIC
Quantity:
20 000
PIC16F87X
11.4
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The A/D result register
pair will NOT be updated with the partially completed
A/D conversion sample. That is, the ADRESH:ADRESL
registers will continue to contain the value of the last
completed conversion (or the last value written to the
ADRESH:ADRESL registers). After the A/D conversion
is aborted, a 2T
FIGURE 11-3:
11.4.1
The ADRESH:ADRESL register pair is the location
where the 10-bit A/D result is loaded at the completion
of the A/D conversion. This register pair is 16-bits wide.
The A/D module gives the flexibility to left or right justify
the 10-bit result in the 16-bit result register. The A/D
FIGURE 11-4:
DS30292C-page 116
A/D Conversions
A/D RESULT REGISTERS
T
CY
Set GO bit
Holding capacitor is disconnected from analog input (typically 100 ns)
7
to T
AD
0000 00
ADRESH
AD
wait is required before the next
Conversion starts
A/D CONVERSION T
A/D RESULT JUSTIFICATION
T
AD
Right Justified
1
2 1 0 7
ADFM = 1
T
AD
b9
2
10-bit Result
T
ADRESL
AD
b8
3
T
AD
b7
AD
4
0
CYCLES
T
AD
b6
10-bit Result
5
T
AD
b5
6
acquisition is started. After this 2T
on the selected channel is automatically started. The
GO/DONE bit can then be set to start the conversion.
In Figure 11-3, after the GO bit is set, the first time seg-
ment has a minimum of T
Format Select bit (ADFM) controls this justification.
Figure 11-4 shows the operation of the A/D result justi-
fication. The extra bits are loaded with ’0’s’. When an
A/D result will not overwrite these locations (A/D dis-
able), these registers may be used as two general
purpose 8-bit registers.
ADRES is loaded
GO bit is cleared
ADIF bit is set
Holding capacitor is connected to analog input
T
AD
b4
Note:
7
7
T
AD
b3
ADRESH
8
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
10-bit Result
T
AD
b2
ADFM = 0
9
Left Justified
T
0 7 6 5
AD
b1
10 T
CY
ADRESL
2001 Microchip Technology Inc.
and a maximum of T
AD
b0
0000 00
11
AD
0
wait, acquisition
AD
.