PIC16LF872-I/SP Microchip Technology, PIC16LF872-I/SP Datasheet - Page 46
PIC16LF872-I/SP
Manufacturer Part Number
PIC16LF872-I/SP
Description
IC MCU FLASH 2KX14 EE A/D 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16C770-ISO.pdf
(8 pages)
2.PIC16F872-ISO.pdf
(168 pages)
3.PIC16F872-ISO.pdf
(5 pages)
4.PIC16F872-ISO.pdf
(6 pages)
5.PIC16LF872-ISP.pdf
(168 pages)
Specifications of PIC16LF872-I/SP
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Oscillator Type
External
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC16LF
No. Of I/o's
22
Eeprom Memory Size
64Byte
Ram Memory Size
128Byte
Cpu Speed
20MHz
No.
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF872-I/SP
Manufacturer:
MICROCLOCK
Quantity:
20 000
- PIC16C770-ISO PDF datasheet
- PIC16F872-ISO PDF datasheet #2
- PIC16F872-ISO PDF datasheet #3
- PIC16F872-ISO PDF datasheet #4
- PIC16LF872-ISP PDF datasheet #5
- Current page: 46 of 168
- Download datasheet (3Mb)
PIC16F872
7.1
The prescaler and postscaler counters are cleared
when any of the following occurs:
• a write to the TMR2 register
• a write to the T2CON register
• any device RESET (POR, MCLR Reset, WDT
TMR2 is not cleared when T2CON is written.
TABLE 7-1:
DS30221C-page 44
0Bh,8Bh,
10Bh, 18Bh
0Ch
8Ch
11h
12h
92h
Legend:
Address
Reset or BOR)
Timer2 Prescaler and Postscaler
x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by the Timer2 module.
INTCON
PIR1
PIE1
TMR2
T2CON
PR2
Name
REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
Timer2 Module Register
Timer2 Period Register
Bit 7
GIE
(3)
(3)
—
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
PEIE
ADIF
ADIE
Bit 6
TMR0IE
Bit 5
(3)
(3)
Bit 4
INTE
(3)
(3)
SSPIE
SSPIF
RBIE
Bit 3
7.2
The output of TMR2 (before the postscaler) is fed to the
SSP module, which optionally uses it to generate shift
clock.
TMR0IF
CCP1IF
CCP1IE
Bit 2
Output of TMR2
TMR2IF
TMR2IE
Bit 1
INTF
© 2006 Microchip Technology Inc.
TMR1IF
TMR1IE
RBIF
Bit 0
0000 000x 0000 000u
0000 0000 0000 0000
1111 1111 1111 1111
r0rr 0000
r0rr 0000
Value on:
POR,
BOR
0000 0000
0000 0000
Value on
RESETS
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