LTC1875 LINER [Linear Technology], LTC1875 Datasheet
LTC1875
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LTC1875 Summary of contents
Page 1
... The internal synchronous switch increases efficiency and eliminates the need for an external Schottky diode. Low output voltages are easily supported with a 0.8V feedback reference voltage. The LTC1875 is available in a 16-lead SSOP package. , LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. ...
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... – 100mA 0.7V, Duty Cycle < RUN INFORMATION ORDER PART TOP VIEW NUMBER 16 PLL_LPF LTC1875EGN 15 SYNC/MODE 14 PGOOD SWP2 GN PART 11 SWN2 MARKING 10 PGND2 9 PV IN2 1875 GN PACKAGE = 110 ...
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... Ramping Up RUN RUN Note 4: The LTC1875 is tested in a feedback loop which servos V balance point for the error amplifier (V Note 5: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. Note 6: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction and power temperature will exceed 125 C when overtemperature protection is active ...
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... LTC1875 W U TYPICAL PERFOR A CE CHARACTERISTICS Output Voltage vs Load Current 1.84 1.82 1.80 1.78 1.76 1.74 Burst Mode OPERATION 1. 3. 4.7 H 1.70 0 500 1000 LOAD CURRENT (mA) Efficiency vs Output Current 4. 1.8V OUT 4.7 H Burst Mode OPERATION 50 0 100 OUTPUT CURRENT (mA) Efficiency vs Input Voltage ...
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... Pulse Skipping Mode Operation I L 200mA/DIV V OUT 100mV/DIV SW 5V/DIV 1875 G09 6.8 H Soft-Start with Shorted Output I VIN 500mA/DIV RUN/SS 1V/DIV 1875 G11 6.8 H LTC1875 1 s/DIV 1875 G10 = 4. 2. OUT OUT I = 50mA LOAD 5ms/DIV 1875 G12 = 3. ...
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... LTC1875 CTIO S SGND (Pin 1): Signal Ground Pin. RUN/SS (Pin 2): Combination of Soft-Start and Run Control Inputs. Forcing this pin below 0.7V shuts down the device. In shutdown all functions are disabled and device draws zero supply current. For the proper operation of the part, force this pin above 2 ...
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... W BLOCK DIAGRA LTC1875 1875f 7 ...
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... Note that there current flowing out of this pin. Soft-start action is accom- plished by connecting an external RC network to the RUN/ SS pin as shown in Figure 1. The LTC1875 actively pulls the RUN/SS pin to ground under low input supply voltage conditions. pin indicates a lower ...
Page 9
... Another important detail to remember is that at low input supply voltages, the R of the P-channel switch DS(ON) increases. Therefore, the user should calculate the power dissipation when the LTC1875 is used at 100% duty cycle with low supply voltage (see Thermal Considerations in the Applications Information section). 2000 ...
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... Figure APPLICATIO S I FOR ATIO The basic LTC1875 application circuit is shown on the first page of this data sheet. External component selection is driven by the load requirement and begins with the selec- tion of L followed by C and C ...
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... L is highest at maximum input voltage since where IN OUT with input voltage. For the LTC1875, the general rule for proper operation is: ESR COUT The choice of using a smaller output capacitance in- creases the output ripple voltage due to the frequency dependent term but can be compensated for by using capacitor(s) of very low ESR to maintain low ripple volt- age ...
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... SGND Figure 4. Setting the LTC1875 Output Voltage Phase-Locked Loop and Frequency Synchronization The LTC1875 has an internal voltage-controlled oscillator and phase detector comprising a phase-locked loop. This allows the MOSFET turn- locked to the rising edge of an external frequency source. The frequency range of the voltage-controlled oscillator is 350kHz to 750kHz ...
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... In most applications, the LTC1875 does not dissipate much heat due to its high efficiency. But, in applications where the LTC1875 is running at high ambient tempera- ture with low supply voltage and high duty cycles, such as in dropout, the heat dissipated may exceed the maximum junction temperature of the part ...
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... DS(ON) usually necessary to iterate times through the equations to achieve a reasonably accurate value for the junction temperature example, consider the LTC1875 in dropout at an input voltage of 3V, a load current of 0.8A and an ambient temperature From the typical performance graph of switch resistance, the R of the P-channel switch DS(ON ...
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... Figure 9. A 4-layer PC board is used in this design. Several guidelines are followed in this layout order to minimize switching noise and improve output load regulation, the PGND pins of the LTC1875 should be connected directly to 1) the negative terminal of the output decoupling capacitors, 2) the negative terminal of the input capacitor and 3) vias to the ground plane immediately adjacent to Pins 1, 7 and 10 ...
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... Place the divider resistors near the LTC1875 in order to keep the high impedance FB node short. Design Example As a design example, assume the LTC1875 is used in a single lithium-ion battery-powered cellular phone applica- tion. The V will be operating from a maximum of 4.2V IN down to about 2 ...
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... H 16 SWP PLL_LPF 6 SWN 11 SWN R1 887k 412k 1 SGND 100 V = 2.5V OUT 100 OUTPUT CURRENT (mA) LTC1875 V IN 2.65V TO 4.2V C IN2 10 F GND C OUT OUT 2.5V/1.5A 1875 F09a 1000 1875 F09b 1875f 17 ...
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... OUT L1: TOKO A921CY-4R7M *1.5A IS THE MAXIMUM OUTPUT CURRENT 18 R SVIN SYNC/MODE PGOOD IN1 PGND 2 10 RUN/SS PGND 5 LTC1875 L1 SWP 12 4 SWP PLL_LPF 6 SWN 11 SWN R1 523k 412k 1 SGND Efficiency vs Output Current 100 V = 1.8V OUT ...
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... TYP .015 .004 45 .053 – .068 (0.38 0.10) (1.351 – 1.727) 0 – 8 TYP .008 – .012 (0.203 – 0.305) LTC1875 .189 – .196* (4.801 – 4.978) .009 (0.229 REF .150 – .157** (3.810 – 3.988) ...
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... SYNC/MODE 100k POWER PGOOD PV IN GOOD PGND 2 RUN/SS 10 PGND LTC1875 SWP 12 4 SWP PLL_LPF 6 SWN 11 R1 SWN 1.29M 47pF 412k SGND R C 220pF 150k COMMENTS 90% Efficiency < ...