LTC1660 LINER [Linear Technology], LTC1660 Datasheet
LTC1660
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LTC1660 Summary of contents
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... Ultralow supply current, power-saving Sleep mode and extremely compact size make the LTC1665 and LTC1660 ideal for battery-powered applications, while their ease of use, high performance and wide supply range make them excellent choices as general purpose converters. ...
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... OUT A OUT B OUT H REF to GND ................................. – 0. Maximum Junction Temperature ......................... 125 C Operating Temperature Range LTC1665C/LTC1660C ............................ LTC1665I/LTC1660I .......................... – Storage Temperature Range ................ – 150 C Lead Temperature (Soldering, 10 sec)................ 300 C ELECTRICAL C HARA TERISTICS C The denotes specifications which apply over the full operating temperature range, otherwise specifications are ...
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... C = 15pF (Note 6) LOAD (Note 6) (Note 6) (Note 6) Continuous Square Wave (Note 6) Continuous 23% Duty Cycle Pulse (Note 6) Gated Square Wave (Note 6) (Note 6) (Note 6) (Note 6) (Note 6) (Note 6) LTC1665/LTC1660 MIN TYP MAX UNITS 10 30 100 120 ...
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... Note 1: Absolute maximum ratings are those values beyond which the life of a device may be impaired. Note 2: Nonlinearity and monotonicity are defined from code 4 to code 255 for the LTC1665 and from code 20 to code 1023 for the LTC1660. See Applications Information. Note 3: Digital inputs ...
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... W U TYPICAL PERFOR A CE CHARACTERISTICS Minimum Supply Headroom vs Load Current (Output Sourcing) 1400 V = 4.096V REF V < 1LSB OUT 1200 CODE = 255 (LTC1665) CODE = 1023 (LTC1660) 1000 800 600 400 200 (mA) (Sourcing) OUT Large-Signal Step Response REF ...
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... G14 (LTC1665) Load Regulation vs Output Current REF CODE = 128 SOURCE SINK 0 500 OUT 1665/60 G11 (LTC1660) Differential Nonlinearity (DNL 4.096V REF 0 256 512 768 1023 CODE 1665/60 G13 Load Regulation vs Output Current ...
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... CMOS and TTL compatible. D (Pin 10): Serial Interface Data Output. Data appears OUT positive SCK edges after being applied to D OUT May be tied another LTC1665/LTC1660 for daisy- IN chain operaton. CMOS and TTL compatible REF CC CLR (Pin 11): Asynchronous Clear Input. All internal shift and DAC registers are cleared to zero at the falling edge of the CLR signal, forcing the analog outputs to zero scale ...
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... The buffered serial output of the shift register is available on the D appears Multiple LTC1665/LTC1660’s can be controlled from a single 3-wire serial port (i.e., SCK, D using the included “daisy-chain” facility. A series of m chips is configured by connecting each D last register. The SCK and CS/LD signals are common to all ...
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... INPUT WORD W –1 Figure 2b. LTC1660 Register Loading Sequence chips in the chain. In use, CS/LD is held low while m 16-bit words are clocked then pulled high, updating all of them simultaneously. Don’t Care Sleep Mode DAC address 1110 instruction (see Table 2). In this mode, the digital interface ...
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... Once in Sleep mode, a load sequence to any other address (including “No Change” addresses 0000 and 1001-1101 ) causes the LTC1665/LTC1660 to Wake possible to keep one or more chips of a daisy chain in continuous Sleep mode by giving the Sleep instruction to these chips each time the active chips in the chain are updated ...
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... Figure 3. Effects of Rail-to-Rail Operation On a DAC Transfer Curve. (a) Overall Transfer Function (b) Effect of Negative Offset for Codes Near Zero Scale (c) Effect of Positive Full-Scale Error for Input Codes Near Full Scale When REF CC OUTPUT VOLTAGE 0 128 INPUT CODE (a) LTC1665/LTC1660 REF CC INPUT CODE (c) 255 = V REF POSITIVE FSE ...
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... LTC1665/LTC1660 U TYPICAL APPLICATIONS A Low Power Quad Trim Circuit with Coarse/Fine Adjustment 3. 0 GND 2 1 – 1 U2A R1 ® LT 1491 COARSE V V OUT1 3 OUT 0 FINE V OUT – 7 U2B R1 LT1491 COARSE OUT2 OUT 0 3.3V FINE 0 OUT D ...
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... REF CS/LD 3-WIRE CLK SERIAL INTERFACE U1 1 LTC1660 DAC A DAC H 2 DAC B DAC G 3 DAC C DAC F 4 DAC D DAC CONTROL ADDRESS LOGIC DECODER 7 SHIFT REGISTER 8 LTC1665/LTC1660 0 – 1 U3A LT1491 V 3 OUT 0 – ...
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... LTC1665/LTC1660 PACKAGE DESCRIPTION 0.007 – 0.0098 (0.178 – 0.249) 0.016 – 0.050 (0.406 – 1.270) * DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE ...
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... DWG # 05-08-1510 0.255 0.015* (6.477 0.381 0.130 0.005 (3.302 0.127) 0.020 (0.508) MIN 0.125 0.100 (3.175) (2.54) MIN BSC LTC1665/LTC1660 0.770* (19.558) MAX 0.045 – 0.065 (1.143 – 1.651) 0.065 (1.651) TYP 0.018 0.003 (0 ...
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... LTC1665/LTC1660 U TYPICAL APPLICATION A Pin Driver CLR LTC1660 DAC H DAC G DAC F DAC E CS/ SCK 8 GND 1 Note: DACs E Through H Can Be Configured for a Second Pin Driver With U2C and U2D of the LT1369 RELATED PARTS PART NUMBER DESCRIPTION LTC1661 Dual 10-Bit V DAC in 8-Lead MSOP Package ...