isl6307a Intersil Corporation, isl6307a Datasheet
isl6307a
Related parts for isl6307a
isl6307a Summary of contents
Page 1
... Eliminating ground differences improves regulation and protection accuracy. The threshold- sensitive enable input is available to accurately coordinate the start up of the ISL6307A with any other voltage rail. Dynamic-VID™ technology allows seamless on-the-fly VID changes. The offset pin allows accurate voltage offset settings that are independent of VID setting ...
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... Pinout 1 VID7 2 VID6 3 VID5 4 VID4 5 VID3 6 VID2 7 VID1 8 VID0 9 DRVEN 10 OFS 11 IOUT 12 DAC 2 ISL6307A ISL6307A (48 LD QFN) TOP VIEW GND PWM3 35 ISEN3+ 34 ISEN3- 33 ISEN1- 32 ISEN1+ 31 PWM1 30 PWM4 29 ISEN4+ 28 ISEN4- 27 ISEN2- 26 ISEN2+ ...
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... ISL6307A Block Diagram VDIFF VR_RDY RGND x1 VSEN OVP SOFT-START +200mV FAULT LOGIC SS DRVEN OFS OFFSET REF DAC VID7 VID6 VID5 VID4 DYNAMIC VID3 VID VID2 D/A VID1 VID0 COMP FB 2V OC2 IOUT IDROOP GND 3 ISL6307A OVP OVP R S DRIVE Q CLOCK AND AND ...
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... PWM1 IOUT ISEN1- ISEN1+ R IOUT PWM3 ISEN3- ISEN3+ VR_FAN PWM5 ISEN5- VR_HOT ISEN5+ TM EN_PWR TCOMP OFS OFS +12V NTC 4 ISL6307A DS(ON) +5V VCC EN ISL6609 DRIVER PWM GND +5V VCC +5V EN ISL6609 DRIVER PWM GND +5V VCC EN ISL6609 PWM DRIVER GND +5V VCC ...
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... PWM1 IOUT ISEN1- ISEN1+ R IOUT PWM3 ISEN3- ISEN3+ VR_FAN PWM5 ISEN5- VR_HOT ISEN5+ TM EN_PWR TCOMP OFS FS SS +5V +5V R OFS +12V NTC 5 ISL6307A DS(ON) +5V VCC EN ISL6609 DRIVER PWM GND +5V VCC +5V EN ISL6609 DRIVER PWM GND +5V VCC EN ISL6609 DRIVER PWM GND +5V VCC EN ...
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... PWM1 IOUT ISEN1- ISEN1+ R IOUT PWM3 ISEN3- ISEN3+ VR_FAN PWM5 ISEN5- VR_HOT ISEN5+ TM EN_PWR TCOMP OFS OFS R T +12V NTC 6 ISL6307A +5V VCC ISL6609 EN DRIVER PWM GND +5V VCC +5V ISL6609 EN DRIVER PWM GND +5V VCC ISL6609 EN DRIVER PWM GND +5V VCC ISL6609 ...
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... PWM1 IOUT ISEN1- R IOUT ISEN1+ PWM3 ISEN3- ISEN3+ VR_FAN PWM5 ISEN5- VR_HOT ISEN5+ TM EN_PWR OFS FS TCOMP SS +5V +5V R OFS +12V NTC 7 ISL6307A +5V VCC ISL6609 EN DRIVER PWM GND +5V VCC +5V ISL6609 EN DRIVER PWM GND +5V VCC ISL6609 EN DRIVER PWM GND +5V VCC ISL6609 EN ...
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... Operating Conditions Supply Voltage, VCC (5V bias mode, Note +5V ±5% Ambient Temperature (ISL6307ACRZ 0°C to 70°C Ambient Temperature (ISL6307AIRZ .-40°C to 85°C CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied ...
Page 9
... Electrical Specifications Operating Conditions: VCC = 5V or ICC < 25mA. Unless Otherwise Specified (Continued) PARAMETER PIN-ADJUSTABLE OFFSET Voltage at OFS Pin for ISL6307ACRZ Voltage at OFS Pin for ISL6307AIRZ OSCILLATORS Accuracy of Switching Frequency Setting Adjustment Range of Switching Frequency (Note 4) Soft-start Ramp Rate (Note 5, 6) Adjustment Range of Soft-start Ramp Rate (Note 4) ...
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... Spec guaranteed by design. 5. During soft-start, VDAC rises from 0 to 1.1V first and then ramp to VID voltage after receiving valid VID input. 6. Soft-start ramp rate is determined by the adjustable soft-start oscillator frequency at the speed of 6.25mV per cycle. 10 ISL6307A TEST CONDITIONS With external pull-up resistor connected ...
Page 11
... When EN_VTT is driven above 0.875V, the ISL6307A is active depending on status of ENLL, the internal POR, and pending fault states. Driving EN_VTT below 0.745V will clear all fault states and prime the ISL6307A to soft-start when re- enabled Use this pin to set up the desired switching frequency. A resistor, placed from FS to ground will set the switching fre- quency ...
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... The voltage at IOUT pin will be proportional to the load current. If the voltage is higher than 2V, ISL6307A will go into OCP mode. The OCP trip level can be adjusted by changing the resistor value. DRVEN - Driver enable output pin. This pin can be used to enable the MOSFET drivers which have enable pins such as ISL6609, ISL6608 or other DrMOS devices ...
Page 13
... PWM Operation The timing of each converter leg is set by the number of active channels. The default channel setting for the ISL6307A is four. One switching cycle is defined as the time between PWM1 pulse termination signals. The pulse termination signal is an internally generated clock signal which triggers the falling edge of PWM1. The cycle time of ...
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... SAMPLE CURRENT, I SWITCHING PERIOD TIME FIGURE 3. SAMPLE AND HOLD TIMING Current Sensing The ISL6307A supports inductor DCR sensing, MOSFET R sensing, or resistive sensing techniques. The DS(ON) internal circuitry, shown in Figures 4, 5, and 6, represents one channel of an N-channel converter. This circuitry is repeated for each channel in the converter, but may not be active depending on the status of the PWM3 and PWM4 pins, as described in the PWM Operation section ...
Page 15
... In order to compensate the temperature effect on the sensed current signal, a Positive Temperature Coefficient (PTC) resistor can be selected for the sense resistor R temperature compensation function of ISL6307A should be utilized. The integrated temperature compensation function is described in the Temperature Compensation section. Channel-Current Balance ...
Page 16
... DAC) and offset errors in the OFS current source, remote-sense and error amplifiers. Intersil specifies the guaranteed tolerance of the ISL6307A to include the combined tolerances of each of these elements. The output of the error amplifier, V COMP sawtooth waveform to generate the PWM signals ...
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... ISL6307A DAC VID1 VID0 VID7 VOLTAGE 12.5mV 6.25mV 800mV 0 0 OFF OFF 1.60000 1.59375 1.58750 1.58125 1.57500 ...
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... ISL6307A DAC VID1 VID0 VID7 VOLTAGE 12.5mV 6.25mV 800mV 1 0 1.12500 1.11875 1.11250 1.10625 1.10000 1.09375 1.08750 ...
Page 19
... 0.54375 0 0 0.53750 Output-Voltage Offset Programming 0 1 0.53125 The ISL6307A allows the designer to accurately adjust the offset voltage. When a resistor 0.52500 OFS to VCC, the voltage across it is regulated to 1.6V. This 1 1 0.51875 causes a proportional current ( 0.51250 R is connected to ground, the voltage across it is OFS regulated to 0 ...
Page 20
... ISL6307A will not inadvertently turn off unless the bias voltage drops substantially (see Electrical Specifications). 2. The ISL6307A features an enable input (EN_PWR) for power sequencing between the controller bias voltage is based on the time duration for 1 bit VID change , the relationship between the time constant of ...
Page 21
... Then, the controller will regulate the VR voltage at 1.1V for another fixed period, TD3. At the end of TD3 period, ISL6307A will read the VID signals. If the VID code is valid, ISL6307A will initiate the second soft-start ramp until the voltage reaches the VID voltage minus offset voltage. ...
Page 22
... Intersil drivers respond to the high-impedance input by turning off both upper and lower MOSFETs. If the overvoltage condition reoccurs, the ISL6307A will again command the lower MOSFETs to turn on. The ISL6307A will continue to protect the load in this fashion as long as the overvoltage condition recurs. Once an overvoltage condition is detected, normal PWM operation ceases until the ISL6307A is reset ...
Page 23
... FIGURE 15. DRVEN DURING OVERCURRENT OPERATION EN, 5V/DIV FIGURE 16. DRVEN DURING OVERVOLTAGE OPERATION There’s no need to use DRVEN when ISL6307A is used with Intersil’s 12V drivers, such as ISL6612 and ISL6614. For drivers such as ISL6609 and ISL6605, DRVEN output of ISL6307A can be connected to the EN pin of the driver. ...
Page 24
... Current Sense Output The ISL6307A has two current sense output pins, IDROOP and IOUT and they are identical typical application where load-line is required, the IDROOP pin is connected to the FB pin. The IOUT pin was designed for load current measurement. As shown in typical application schematics ...
Page 25
... NTC will track the temperature of the current sense component. Therefore, the TM voltage can be utilized to (EQ. 19) obtain the temperature of the current sense component. ISL6307A converts the TM pin voltage to a 6-bit TM digital (EQ. 20) signal for temperature compensation. With the non-linear A/D converter of ISL6307A, TM digital signal is linearly proportional to the NTC temperature ...
Page 26
... ISL6307A multiplexes the TCOMP factor N with the TM digital signal to obtain the adjustment gain to compensate the temperature impact on the sensed channel current. The compensated channel current signal is used for droop and overcurrent protection functions. Design procedure: 1. Properly choose the voltage divider for TM to match the TM voltage vs ...
Page 27
... MOSFET R rr conduction loss. 27 ISL6307A When the upper MOSFET turns off, the lower MOSFET does not conduct any portion of the inductor current until the voltage at the phase node falls below ground. Once the lower MOSFET begins conducting, the current in the upper MOSFET falls to zero as the current in the lower MOSFET ramps up to assume the full inductor current ...
Page 28
... Case 1: and (OPTIONAL COMP FB + IDROOP DROOP - VDIFF LOAD-LINE REGULATED ISL6307A CIRCUIT , has already been chosen The target 0 1 ------------------- > 2π LC 2π ----------------------------------- - C FB 0.75V IN ...
Page 29
... ESR L FIGURE 24. COMPENSATION CIRCUIT FOR ISL6307A BASED The first step is to choose the desired bandwidth the peak-to- PP compensated system. Choose a frequency high enough to assure adequate transient performance but not higher than 1/3 of the switching frequency. The type-III compensator has ...
Page 30
... As the bulk capacitors sink and source the inductor ac ripple current (see Interleaving and Equation 2), a voltage develops across the bulk-capacitor ESR equal to I (ESR). Thus, once the output capacitors C,PP 30 ISL6307A are selected, the maximum allowable ripple voltage, is the peak-to PP(MAX) ( ...
Page 31
... This is a result from the high current slew rates produced by the upper MOSFETs turning 31 ISL6307A on and off. Select low ESL ceramic capacitors and place one as close as possible to each upper MOSFET drain to minimize board parasitic impedances and maximize suppression ...
Page 32
... Locate the output capacitors between the inductors and the load, while keeping them in close proximity to the microprocessor socket. The ISL6307A can be placed off to one side or centered relative to the individual phase switching components. Routing of sense lines and PWM signals will guide final 32 ISL6307A placement ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 33 ISL6307A L48.7x7 48 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220VKKD-2 ISSUE C) ...