cy62167dv30 Cypress Semiconductor Corporation., cy62167dv30 Datasheet

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cy62167dv30

Manufacturer Part Number
cy62167dv30
Description
16-mbit 1m X 16 Static Ram
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Cypress Semiconductor Corporation
Document #: 38-05328 Rev. *G
Features
Functional Description
The CY62167DV30 is a high-performance CMOS static RAM
organized as 1M words by 16 bits. This device features
advanced circuit design to provide ultra-low active current.
This is ideal for providing More Battery Life™ (MoBL
portable applications such as cellular telephones. The device
Note:
1. For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
Logic Block Diagram
• TSOP I Configurable as 1M x 16 or as 2M x 8 SRAM
• Very high speed: 45 ns
• Wide voltage range: 2.2V – 3.6V
• Ultra-low active power
• Ultra-low standby power
• Easy memory expansion with CE
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Available in Pb-free and non Pb-free 48-ball VFBGA
— Typical active current: 2 mA @ f = 1 MHz
— Typical active current: 18.5 mA @ f = f
and 48-pin TSOP I package
speed)
A
A
A
A
A
A
A
A
A
A
A
10
9
8
7
6
5
4
3
2
1
0
[1]
Power-Down
Circuit
COLUMN DECODER
1
DATA IN DRIVERS
, CE
1M × 16 / 2M x 8
RAM Array
2
and OE features
Max
198 Champion Court
(45 ns
®
) in
also has an automatic power-down feature that significantly
reduces power consumption by 99% when addresses are not
toggling. The device can also be put into standby mode when
deselected (CE
HIGH). The input/output pins (I/O
in a high-impedance state when: deselected (CE
LOW), outputs are disabled (OE HIGH), both Byte High
Enable and Byte Low Enable are disabled (BHE, BLE HIGH),
or during a Write operation (CE
LOW).
Writing to the device is accomplished by taking Chip Enables
(CE
If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O
through I/O
address pins (A
LOW, then data from I/O pins (I/O
the location specified on the address pins (A
Reading from the device is accomplished by taking Chip
Enables (CE
LOW while forcing the Write Enable (WE) HIGH. If Byte Low
Enable (BLE) is LOW, then data from the memory location
specified by the address pins will appear on I/O
High Enable (BHE) is LOW, then data from memory will appear
on I/O
sheet for a complete description of Read and Write modes.
BHE
BLE
16-Mbit (1M x 16) Static RAM
1
LOW and CE
8
to I/O
San Jose
7
), is written into the location specified on the
1
15
LOW and CE
1
. See the truth table at the back of this data
0
HIGH or CE
through A
2
HIGH) and Write Enable (WE) input LOW.
,
I/O
I/O
CA 95134-1709
OE
BLE
BYTE
BHE
WE
CY62167DV30 MoBL
0
8
–I/O
–I/O
19
2
2
CE
CE
HIGH) and Output Enable (OE)
). If Byte High Enable (BHE) is
LOW or both BHE and BLE are
7
15
2
1
8
Revised July 27, 2006
1
0
through I/O
LOW, CE
through I/O
CE
CE
2
1
2
0
15
through A
0
HIGH and WE
15
) is written into
408-943-2600
1
to I/O
HIGH or CE
) are placed
7
. If Byte
19
).
®
2
0
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cy62167dv30 Summary of contents

Page 1

... Available in Pb-free and non Pb-free 48-ball VFBGA and 48-pin TSOP I package [1] Functional Description The CY62167DV30 is a high-performance CMOS static RAM organized as 1M words by 16 bits. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL portable applications such as cellular telephones ...

Page 2

... A A DNU 48-Pin TSOP I (Forward) ( Top View to use the device SRAM. The 48-TSOPI package can also be used ® CY62167DV30 MoBL Power Dissipation (mA Standby I (µA) Max SB2 [2] [2] Typ. Max. ...

Page 3

... V CC Document #: 38-05328 Rev. *G Output Current into Outputs (LOW) .............................20 mA Static Discharge Voltage .......................................... > 2001V (per MIL-STD-883, Method 3015) Latch-up Current .....................................................> 200 mA Operating Range + 0.3V Device CC CY62167DV30LL Industrial + 0. 0.3V CC CY62167DV30-45 CY62167DV30-55 CY62167DV30-70 [2] Min. Typ. Max. Min. Typ 2.20V 2 2.70V 2 2.20V 0 ...

Page 4

... Operating Range) Conditions > V – 0.2V > V – 0. > 100 µs or stable at V > 100 µ CC(min.) CC(min.) CY62167DV30 MoBL Max. Unit VFBGA TSOP I Unit °C °C/W 16 4.3 90% 10% Fall Time = 1 V/ns Unit Ω Ω ...

Page 5

... Test Loads and Waveforms” section less than less than HZCE LZCE HZBE LZBE HZOE = V , BHE and/or BLE = CY62167DV30 MoBL V , min Min. Max. Min. Max. Unit ...

Page 6

... BHE, BLE transition LOW and CE 1 Document #: 38-05328 Rev. *G [19, 20 OHA DBE t DOE DATA VALID 50% , BHE and/or BLE = V , and transition HIGH. 2 ® CY62167DV30 MoBL DATA VALID HZCE t HZBE t HZOE HIGH IMPEDANCE Page [+] Feedback ...

Page 7

... HZOE Notes: 22. Data I/O is high-impedance 23 goes HIGH and CE goes LOW simultaneously with 24. During this period, the I/Os are in output state and input signals should not be applied. Document #: 38-05328 Rev. *G CY62167DV30 MoBL SCE PWE VALID DATA , the output remains in a high-impedance state ...

Page 8

... SA WE DATA I/O See Note 23 t Document #: 38-05328 Rev. *G [18, 22, 23, 24 SCE PWE VALID DATA [23, 24 SCE PWE t SD VALID DATA HZWE ® CY62167DV30 MoBL LZWE Page [+] Feedback ...

Page 9

... Data In (I/O –I Data In (I/O –I High Z (I/O –I High Z Output Disabled L High Z Output Disabled L High Z Output Disabled ® CY62167DV30 MoBL Mode Power Standby ( Standby ( Standby ( Read Active ( Read Active ( Read Active ( ...

Page 10

... Fine Pitch BGA ( mm) (Pb-free) 51-85183 48-pin TSOP I ( mm) 48-pin TSOP I ( mm) (Pb-free) 51-85178 48-ball Fine Pitch BGA ( mm) 48-ball VFBGA ( mm) (51-85178) A ® CY62167DV30 MoBL Operating Range Industrial BOTTOM VIEW A1 CORNER Ø0. Ø ...

Page 11

... Cypress against all charges. 48-pin TSOP I (12 x 18.4 x 1mm) (51-85183) N 0.472[12.00] 0.724 [18.40] 0.047[1.20] MAX. 0.787[20.00] 0.010[0.25] GAUGE PLANE 0.020[0.50] 0.028[0.70] ® CY62167DV30 MoBL 0.037[0.95] 0.041[1.05] 0.020[0.50] TYP. 0.007[0.17] 0.011[0.27] 0.002[0.05] 0.006[0.15] 51-85183-*A Page [+] Feedback ...

Page 12

... Document History Page Document Title: CY62167DV30 MoBL Document Number: 38-05328 Orig. of REV. ECN NO. Issue Date Change ** 118408 09/30/02 *A 123692 02/11/03 *B 126555 04/25/03 *C 127841 09/10/03 *D 205701 *E 238050 See ECN KKV/AJU Replaced 48-ball VFBGA package diagram; Modified Package Name in *F 304054 See ECN *G 492895 See ECN Document #: 38-05328 Rev. *G ® ...

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