ADP3211 ON Semiconductor, ADP3211 Datasheet

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ADP3211

Manufacturer Part Number
ADP3211
Description
7-bit, Programmable, Single-phase, Synchronous Buck Controller
Manufacturer
ON Semiconductor
Datasheet

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ADP3211, ADP3211A
7-Bit, Programmable,
Single-Phase, Synchronous
Buck Controller
buck switching regulator controller. With its integrated driver, the
ADP3211 is optimized for converting the notebook battery voltage to
the supply voltage required by high performance Intel chipsets. An
internal 7−bit DAC is used to read a VID code directly from the
chip−set or the CPU and to set the GMCH render voltage or the CPU
core voltage to a value within the range of 0 V to 1.5 V.
programmable switching frequency that can be optimized for
efficiency depending on the output current requirement. In addition,
the ADP3211 includes a programmable load line slope function to
adjust the output voltage as a function of the load current so that the
core voltage is always optimally positioned for a load transient. The
ADP3211 also provides accurate and reliable current overload
protection and a delayed power−good output. The IC supports
on−the−fly (OTF) output voltage changes requested by the chip−set.
applications in CPU mode. The ADP3211A has a boot voltage of
1.2 V in CPU mode.
range of −10°C to 100°C and is available in a 32−lead QFN.
Features
Applications
© Semiconductor Components Industries, LLC, 2009
April, 2009 − Rev. 0
The ADP3211 is a highly efficient, single−phase, synchronous
The ADP3211 uses a multi−mode architecture. It provides
The ADP3211 has a boot voltage of 1.1 V for IMVP−6.5
The ADP3211 is specified over the extended commercial temperature
Overtemperature
Light Load Operation
Additional Design Flexibility
(VID) OTF Transients
Single−Chip Solution
Input Voltage Range of 3.3 V to 22 V
±7 mV Worst−Case Differentially Sensed Core Voltage Error
Automatic Power−Saving Modes Maximize Efficiency During
Soft Transient Control Reduces Inrush Current and Audio Noise
Independent Current Limit and Load Line Setting Inputs for
Built−in Power−Good Masking Supports Voltage Identification
7−Bit, Digitally Programmable DAC with 0 V to 1.5 V Output
Short−Circuit Protection
Current Monitor Output Signal
This is a Pb−Free Device
Fully RoHS Compliant
32−Lead QFN
Notebook Power Supplies for Next Generation Intel Chipsets
Intel Netbook Atom Processors
Chipset Voltage Regulator Specifications Integrated MOSFET
Drivers
Fully Compatible with the Intel
®
IMVP−6.5t CPU and GMCH
1
PWRGD
See detailed ordering and shipping information in the package
dimensions section on page 31 of this data sheet.
CLKEN
FBRTN
COMP
IMON
GPU
ILIM
FB
ORDERING INFORMATION
xxx
A
WL
YY
WW = Work Week
1
1
MARKING DIAGRAM
http://onsemi.com
PIN ASSIGNMENT
1
32
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
AWLYYWW
ADP3211A
(top view)
ADP3211
xxxxxx
xxxxxx
Publication Order Number:
CASE 488AM
MN SUFFIX
QFN32
ADP3211/D
VCC
BST
DRVH
SW
PVCC
DRVL
PGND
GND

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ADP3211 Summary of contents

Page 1

... The IC supports on−the−fly (OTF) output voltage changes requested by the chip−set. The ADP3211 has a boot voltage of 1.1 V for IMVP−6.5 applications in CPU mode. The ADP3211A has a boot voltage of 1 CPU mode. The ADP3211 is specified over the extended commercial temperature range of − ...

Page 2

GND VCC EN UVLO Shutdown and Bias COMP VEA FB − REF + + CSREF LLINE 1.55V DAC + 200mV − + CSREF − + DAC − 300 mV PWRGD Startup PWRGD Delay Open PWRGD ...

Page 3

ABSOLUTE MAXIMUM RATINGS Parameter V CC FBRTN, PGND BST, DRVH DC t < 200 ns BST < 200 ns BST < 200 ns DRVH to SW DRVL to PGND DC ...

Page 4

... Voltage Error Amplifier Output and Frequency Compensation Point. 7 GPU GMCH/CPU select pin. Connect to ground when powering the CPU. Connect to 5.0 V when powering the GMCH. When GPU is connected to ground, the boot voltage is 1.1 V for the ADP3211 and 1.2 V for the ADP3211A. When GPU is connected to 5.0 V, there is no boot voltage. 8 ILIM Current Limit Set pin ...

Page 5

... V = 1.2125 V to 1.5000 V DAC Measured during boot delay period, GPU = 0 V ADP3211 ADP3211A Measured from EN pos edge Measured from EN pos edge to FB settles 1.1 V within −5% boot Measured from FB settling to Vboot = 1.1 V within −5% to CLKEN neg edge Soft−Start Arbitrary VID step − ...

Page 6

ELECTRICAL CHARACTERISTICS ( −10°C to 100°C, unless otherwise noted. (Note 1) Current entering a pin (sunk by the device) has a positive sign. A Parameter Symbol VOLTAGE MONITORING and PROTECTION − Power Good PWRGD High Leakage I PWRGD ...

Page 7

ELECTRICAL CHARACTERISTICS ( −10°C to 100°C, unless otherwise noted. (Note 1) Current entering a pin (sunk by the device) has a positive sign. A Parameter Symbol PULSE WIDTH MODULATOR − Clock Oscillator R Voltage PWM ...

Page 8

ELECTRICAL CHARACTERISTICS ( −10°C to 100°C, unless otherwise noted. (Note 1) Current entering a pin (sunk by the device) has a positive sign. A Parameter Symbol HIGH−SIDE MOSFET DRIVER Pullup Resistance, Sourcing Current Pulldown Resistance, Sinking Current Transition ...

Page 9

TYPICAL PERFORMANCE CHARACTERISTICS V VID Output Voltage 1 VID5 Switch 2 Node 3 1: 200mV/div 3 : 10V/div 2: 2V/div Input = 12V, 1A Load VID Step 0.7V to 1.2V Figure 3. VID Change Soft Transient 300 250 S W ...

Page 10

TYPICAL PERFORMANCE CHARACTERISTICS Output Voltage 0.5V/div 3: 5V/div 2ms/div GPU = 0V 4: 5V/div 2: 5V/div Figure 9. Startup Waveforms CPU Mode Output Voltage 1 Switch Node Low Side Gate Drive ...

Page 11

TYPICAL PERFORMANCE CHARACTERISTICS Output Voltage 1 Switch Node 2 Input = 12V 40 ms/div 1: 50mV/div Output = 1.2V 2: 10V/div 15A to 3A Step Figure 15. Load Transient Output Voltage 1 Switch Node 2 200 ms/div Input = 12V ...

Page 12

... Operation Modes The ADP3211 runs in RPM mode for the purpose of fast transient response and high light load efficiency. During the following transients, the ADP3211 runs in PWM mode: • Soft−Start • Soft transient: the period of 110 ms following any VID change • ...

Page 13

... C Setting Switch Frequency Master Clock Frequency in PWM Mode When the ADP3211 runs in PWM, the clock frequency is set by an external resistor connected from the RT pin to GND. The frequency varies with the VID voltage: the lower the VID voltage, the lower the clock frequency. The ...

Page 14

... With GPU pulled to ground, the ADP3211 steps sequentially through each VID code until it reaches the boot voltage. With GPU pulled to 5.0 V, the ADP3211 steps sequentially through each VID code until it reaches the set VID code voltage. The powerup sequence is illustrated in Figure 22 for GPU connected to ground and Figure 23 for GPU connected to 5 ...

Page 15

... If the output voltage drops below the power−good limit, the PWRGD signal transitions. After the PWRGD single transitions, internal waits 8 ms before latching off the ADP3211. Figure 24 shows how the ADP3211 reacts to a current overload. http://onsemi.com 15 CORE ...

Page 16

... The ADP3211 automatically goes into DCM with a light load. Figure 31 shows the typical DCM waveform of the ADP3211 with load current. As the load increases, the ADP3211 enters into CCM. In DCM, frequency decreases with load current, and switching frequency is a function of the inductor, load current, input voltage, and output voltage ...

Page 17

... V threshold and the EN pin must be driven high. If the V voltage is less than the V is logic low, the ADP3211 shuts off. In shutdown mode, the controller holds DRVH and DRVL low and drives PWRGD to low. The user must adhere to proper power−supply sequencing during startup and shutdown of the ADP3211 ...

Page 18

... The ADP3211 includes an output current monitor function. The I MON directly proportional to the output current. This current is then run through a parallel RC connected from the I to the FBRTN pin to generate an accurately scaled and filtered voltage. The maximum voltage on I internally clamped by the ADP3211 at 1.15.V. VID3 VID2 VID1 ...

Page 19

Table 1. VID Code Table VID6 VID5 VID4 ...

Page 20

Table 1. VID Code Table VID6 VID5 VID4 ...

Page 21

PWRGD IREF EN RPM VID0 R14 200 kΩ RT VID1 R15 340 kΩ RAMP VID2 LLINE VID3 R24 DNP CSREF VID4 CSFB VID5 CSCOMP VID6 Figure 33. Typical Application Circuit http://onsemi.com 21 V3.3V VR_ON VID0 VID1 VID2 VID3 VID4 VID5 ...

Page 22

... R Setting the Switching Frequency for ) = 19 V RPM Operation During the RPM operation, the ADP3211 runs 1.1 V pseudo−constant frequency if the load current is high enough for continuous current mode. While in DCM, the switching frequency is reduced with the load current in a linear manner ...

Page 23

VID MIN VID O MIN RIPPLE In this example assumed to be the ESR of the ...

Page 24

... Place as close as possible to nearest inductor ADP3211 CSCOMP CSFB − CSREF + Figure 34. Temperature−Compensation Circuit Values The following procedure and expressions yield values for and R (the thermistor value at 25°C) for CS1 CS2 TH a given R value Select an NTC to be used based on its type and value ...

Page 25

C X(MIN) C X(MAX) To meet the conditions of these expressions and the transient response, the ESR of the bulk capacitor bank (R should be less than two times the droop resistance, R the C is greater than C X(MIN) ...

Page 26

... V CC Current Limit Set−Point To select the current limit set point, we need to find the resistor value for R ADP3211 is set when the current in R internal reference current of 20 mA. The current in R equal to the inductor current times R using the following equation: n ...

Page 27

... A Type III compensator on the voltage feedback is adequate for proper compensation of the output filter. (eq. 27) Figure 35 shows the Type III amplifier used in the ADP3211. Figure 36 shows the locations of the two poles (eq. 28) and two zeros created by this amplifier. f (eq. 29) ...

Page 28

... Set Up and Test the Circuit 1. Build a circuit based on the compensation values computed from the design spreadsheet. (eq. 38) 2. Connect a dc load to the circuit. 3. Turn on the ADP3211 and verify that it operates (eq. 39) properly. 4. Check for jitter with no load and full load conditions. Set the DC Load Line 1 ...

Page 29

Measure the output ripple with no load and with a full load with scope, making sure both are within the specifications. Set the AC Load Line 1. Remove the dc load from the circuit and connect a dynamic load. ...

Page 30

... If critical signal lines (including the output voltage sense lines of the ADP3211) must cross through power circuitry best if a signal ground plane can be interposed between those signal lines and the traces of the power circuitry. ...

Page 31

... V common node for the inductor. CCGFX 3. On the back of the ADP3211 package, there is a metal pad that can be used to heat sink the device. Therefore, running vias under the ADP3211 is not recommended because the metal pad may cause shorting between vias ...

Page 32

... E 5.00 BSC E2 2.950 3.100 3.250 e 0.500 BSC K 0.200 −−− −−− L 0.300 0.400 0.500 SOLDERING FOOTPRINT* 5.30 3.20 3. 0.50 PITCH ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your loca Sales Representative ADP3211/D ...

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