74lv4020 NXP Semiconductors, 74lv4020 Datasheet
74lv4020
Manufacturer Part Number
74lv4020
Description
74lv4020 14-stage Binary Ripple Counter
Manufacturer
NXP Semiconductors
Datasheet
1.74LV4020.pdf
(20 pages)
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1. General description
2. Features
3. Applications
The 74LV4020 is a low-voltage Si-gate CMOS device and is pin and function compatible
with the 74HC4020 and 74HCT4020.
The 74LV4020 is a 14-stage binary ripple counter with a clock input (CP), an overriding
asynchronous master reset input (MR) and 12 fully buffered parallel outputs (Q0, and
Q3 to Q13).
The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all
counter stages and forces all outputs LOW, independent of the state of CP.
Each counter stage is a static toggle flip-flop.
74LV4020
14-stage binary ripple counter
Rev. 01 — 29 November 2005
Optimized for low-voltage applications: 1.0 V to 5.5 V
Accepts TTL input levels between V
Typical LOW-level output voltage (peak) or output ground bounce: V
V
Typical HIGH-level output voltage (valley) or output V
V
ESD protection:
Multiple package options
Specified from 40 C to +80 C and from 40 C to +125 C.
Frequency dividing circuits
Time delay circuits
Control counters
CC
CC
HBM EIA/JESD22-A114-C exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
= 3.3 V and T
= 3.3 V and T
amb
amb
= 25 C
= 25 C
CC
= 2.7 V and V
CC
OH
Product data sheet
= 3.6 V
undershoot: V
OL(p)
OH(v)
< 0.8 V at
> 2 V at
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