74LVX02SJ_Q Fairchild Semiconductor, 74LVX02SJ_Q Datasheet
74LVX02SJ_Q
Specifications of 74LVX02SJ_Q
Related parts for 74LVX02SJ_Q
74LVX02SJ_Q Summary of contents
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... B Inputs Outputs n ©1993 Fairchild Semiconductor Corporation 74LVX02 Rev. 1.4.0 General Description The LVX02 contains four 2-input NOR gates. The inputs tolerate voltages allowing the interface of 5V systems to 3V systems. Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5 ...
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... Input Voltage I V Output Voltage O T Operating Temperature Input Rise and Fall Time Note: 1. Unused inputs must be held HIGH or LOW. They may not float. ©1993 Fairchild Semiconductor Corporation 74LVX02 Rev. 1.4.0 Parameter –0.5V I (1) Parameter 2 Rating –0.5V to +7.0V –20mA –0. –20mA +20mA – ...
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... Quiet Output Maximum Dynamic V OLP V Quiet Output Minimum Dynamic V OLV V Minimum HIGH Level Dynamic Input Voltage IHD V Maximum LOW Level Dynamic Input Voltage ILD Note: 2. Input t t 3ns r f ©1993 Fairchild Semiconductor Corporation 74LVX02 Rev. 1.4.0 V Conditions Min. Typ. Max. CC 2.0 3.0 3.6 2.0 3.0 3.6 2 ...
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... Input Capacitance IN C Power Dissipation Capacitance PD Note defined as the value of the internal equivalent capacitance which is calculated from the operating current PD consumption without load. Average operating current can be obtained by the eqation: I ©1993 Fairchild Semiconductor Corporation 74LVX02 Rev. 1.4 (V) C (pF) Min 2 3.3 ± ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...