72V82L15PA IDT, 72V82L15PA Datasheet
72V82L15PA
Specifications of 72V82L15PA
Related parts for 72V82L15PA
72V82L15PA Summary of contents
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... FFA EFA XOA/HFA IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The AsyncFIFO™ trademark of Integrated Device Technology, Inc. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES © 2012 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. ...
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... IDT72V81/72V82/72V83/72V84/72V85 3.3V CMOS DUAL ASYNCHRONOUS FIFO 512 x 9, 1024 x 9, 2048 x 9, 4096 x 9, 8192 x 9 PIN CONFIGURATION FFA GND XOA/HFA 13 EFA 14 FFB ...
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... XI Recovery Time XIR t XI Set-up Time XIS NOTES: 1. Timings referenced Test Conditions. 2. Pulse widths less than minimum value are not allowed. 3. Values guaranteed by design, not currently tested. 4. Only applies to read data flow-through mode. (1) = 3.3V±0.3V -40°C to +85° Commercial ...
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... If the read pointer is not moved after Reset (RS), the Full-Flag (FF) will go low after 512 writes for the IDT72V81, 1,024 writes for the IDT72V82, 2,048 writes for the IDT72V83, 4,096 writes for the IDT72V84 and 8,192 writes for the IDT72V85. EMPTY FLAG ( EF ) ...
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... IDT72V81/72V82/72V83/72V84/72V85 3.3V CMOS DUAL ASYNCHRONOUS FIFO 512 x 9, 1024 x 9, 2048 x 9, 4096 x 9, 8192 HF, FF NOTES: 1. EF, FF, HF may change status during Reset, but flags will be valid and around the rising edge of RS ...
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... IDT72V81/72V82/72V83/72V84/72V85 3.3V CMOS DUAL ASYNCHRONOUS FIFO 512 x 9, 1024 x 9, 2048 x 9, 4096 x 9, 8192 x 9 LAST READ IGNORED READ REF VALID DATA OUT RT W,R HF, EF FIRST WRITE ADDITIONAL WRITES t WEF Figure 5. Empty Flag From Last Read to First Write ...
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... XIS Figure 11. Expansion In strates a four-FIFO Depth Expansion using two IDT72V81/72V82/72V83/ 72V84/72V85s. Any depth can be attained by adding additional IDT72V81/ 72V82/72V83/72V84/72V85s. These FIFOs operate in the Depth Expansion mode when the following conditions are met: 1. The first FIFO must be designated by grounding the First Load (FL) control input ...
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... FULL FLAG (FFA) RESET (RS) Figure 13. Block Diagram of One 512 x 18, 1,024 x 18, 2,048 x 18, 4,096 x 18 and 8,192 x 18 FIFO Memory Used in Width Expansion Mode FIFO permits a reading of a single word after writing one word of data into an empty FIFO. The data is enabled on the bus in (t ...
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... IDT72V81/72V82/72V83/72V84/72V85 3.3V CMOS DUAL ASYNCHRONOUS FIFO 512 x 9, 1024 x 9, 2048 x 9, 4096 x 9, 8192 x 9 TABLE I—RESET AND RETRANSMIT Single Device Configuration/Width Expansion Mode Mode RS Reset 0 Retransmit 1 Read/Write 1 NOTE: 1. Pointer will increment if flag is High. TABLE II—RESET AND FIRST LOAD TRUTH TABLE ...
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... IDT 72V81/72V82/72V83 72V84/72V85 DEPTH EXPANSION BLOCK NOTES: 1. For depth expansion block see section on Depth Expansion and Figure 14. 2. For Flag detection see section on Width Expansion and Figure 13. SIDE 1 DATA DATA OUT ...
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... IDT72V81/72V82/72V83/72V84/72V85 3.3V CMOS DUAL ASYNCHRONOUS FIFO 512 x 9, 1024 x 9, 2048 x 9, 4096 x 9, 8192 DATA IN DATA OUT t RFF t A DATA VALID OUT Figure 18. Write Data Flow-Through Mode 11 COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES t WPF WFF DATA VALID 3966 drw 20 ...
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... Dual FIFO 72V82 2,048 x 9 ⎯ 3.3V Dual FIFO 72V83 4,096 x 9 ⎯ 3.3V Dual FIFO 72V84 8,192 x 9 ⎯ 3.3V Dual FIFO 72V85 for SALES: 800-345-7015 or 408-284-8200 fax: 408-284-2775 www.idt.com 12 Access Time ( Speed in Nanoseconds 3966 drw 21 for Tech Support: 408-360-1753 email: FIFOhelp@idt.com ...