IDT72V36102 IDT [Integrated Device Technology], IDT72V36102 Datasheet - Page 22

• Manufacturer Part Number: IDT72V36102
• Description: 3.3 VOLT CMOS SyncBiFIFO-TM
• Manufacturer: IDT [Integrated Device Technology]

NOTE:
1. t
A0-A35
B0-B35
IDT72V3682/72V3692/72V36102 3.3V CMOS SyncBiFIFO
16,384 x 36 x 2, 32,768 x 36 x 2 and 65,536 x 36 x 2
CLKA edge is less than t
W/RB
CLKA
SKEW1
CLKB
W/RA
MBB
MBA
CSB
ENB
EFB
CSA
ENA
FFA
is the minimum time between a rising CLKB edge and a rising CLKA edge for FFA to transition HIGH in the next CLKA cycle. If the time between the rising CLKB edge and rising
LOW
LOW
HIGH
FIFO1 Full
HIGH
LOW
HIGH
Previous Word in FIFO1 Output Register
t
CLKH
SKEW1
Figure 13. FFA Flag Timing and First Available Write when FIFO1 is Full (IDT Standard Mode)
, then FFA may transition HIGH one CLKA cycle later than shown.
t
CLK
t
ENS2
t
CLKL
t
t
SKEW1
ENH
t
A
(1)
1
t
TM
CLKH
t
CLK
22
t
CLKL
2
Next Word From FIFO1
t
PIR
t
t
ENS2
ENS2
t
DS
COMMERCIAL TEMPERATURE RANGE
To FIFO1
Write
t
t
PIR
t
DH
t
ENH
ENH
4679 drw 16