at91sam9g25-cu ATMEL Corporation, at91sam9g25-cu Datasheet - Page 25
at91sam9g25-cu
Manufacturer Part Number
at91sam9g25-cu
Description
At91sam Arm-based Embedded Mpu
Manufacturer
ATMEL Corporation
Datasheet
1.AT91SAM9G25-CU.pdf
(53 pages)
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6.2
6.3
11032AS–ATARM–27-Jul-11
APB/AHB Bridge
Bus Matrix
The AT91SAM9G25 product embeds two separated APB/AHB bridges.
This architecture enables to make concurrent access on both bridges.
Each peripheral can be clocked at a lower speed (MCK divided clock) in order to decrease the
current consumption.
• 12-layer Matrix, handling requests from 11 masters
• Programmable Arbitration strategy
• Burst Management
• One Address Decoder provided per Master
• Boot Mode Select
• Remap Command
– Fixed-priority Arbitration
– Round-Robin Arbitration, either with no default master, last accessed default master
– Breaking with Slot Cycle Limit Support
– Undefined Burst Length Support
– Three different slaves may be assigned to each decoded memory area: one for
– Non-volatile Boot Memory can be internal ROM or external memory on EBI_NCS0
– Selection is made by General purpose NVM bit sampled at reset
– Allows Remapping of an Internal SRAM in Place of the Boot Non-Volatile Memory
– Allows Handling of Dynamic Exception Vectors
or fixed default master
internal ROM boot, one for internal flash boot, one after remap
(ROM or External Flash)
SAM9G25
25