w83637hg Winbond Electronics Corp America, w83637hg Datasheet - Page 112
w83637hg
Manufacturer Part Number
w83637hg
Description
Winbond Lpc I/o Lpc I/o
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W83637HG.pdf
(151 pages)
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CR74 (Default 0x02 if PNPCSV = 0 during POR, default 0x04 otherwise)
CRF0 (Default 0x0E)
FDD Mode Register
Bit 7 - 3 : Reserved.
Bit 2 - 0 : These bits select DRQ resource for FDC.
Bit 7
This bit controls the internal pull-up resistors of the FDC input pins RDATA, INDEX, TRAK0,
DSKCHG, and WP.
Bit 6
This bit determines the polarity of all FDD interface signals.
Bit 5
When this bit is a logic 0, indicates a second drive is installed and is reflected in status register A.
Bit 4
Bit 3 - 2 :Interface Mode
Bit 1
Bit 0
= 0x00 DMA0
= 0x01 DMA1
= 0x02 DMA2
= 0x03 DMA3
= 0x04 - 0x07
: FIPURDWN
= 0
= 1
: INTVERTZ
= 0
= 1
: DRV2EN (PS2 mode only)
: Swap Drive 0, 1 Mode
= 0
= 1
= 11
= 10
= 01
= 00
: FDC DMA Mode
= 0
= 1
: Floppy Mode
= 0
= 1
Burst Mode is enabled
Non-Burst Mode (Default)
Normal Floppy Mode (Default)
Enhanced 3-mode FDD
No Swap (Default)
Drive and Motor select 0 and 1 are swapped.
The internal pull-up resistors of FDC are turned on.(Default)
The internal pull-up resistors of FDC are turned off.
FDD interface signals are active low.
FDD interface signals are active high.
AT Mode (Default)
(Reserved)
PS/2
Model 30
No DMA active
- 107 -
Publication Release Date: March, 2006
W83637HF/HG
Revision 1.6
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