e-stlc3095 STMicroelectronics, e-stlc3095 Datasheet - Page 16

• Manufacturer Part Number: e-stlc3095
• Description: Integrated Pots Interface For Home Gateway And Wll
• Manufacturer: STMicroelectronics

Functional description
3.2.5
3.2.6
Table 10.
16/28
Name
RREF
CSVR
RRX
Rx input bias resistor
Negative Battery Filter
Bias setting current
Layout recommendation
A properly designed PCB layout is a basic issue to guarantee a correct behavior and good
noise performances.
Particular care must be taken on the ground connection and in this case the star
configuration allows surely to avoid possible problems (see Application Diagram
and
The ground of the power supply (VPOS) has to be connected to the center of the star,
named SYSTEM-GND. This point should show a resistance as low as possible, that means
it should be a ground plane.
To avoid noise problems the layout should prevent any coupling between the DC/DC
converter components and analog pins that are referred to AGND (ex: RD, IREF, RTH,
RLIM, VF). As a first recommendation the components CV, L, T1, D1, CVPOS, RSENSE
should be kept as close as possible to each other and isolated from the other components.
Additional improvements can be obtained:
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External components list
In order to properly define the external components value the following system parameters
have to be defined:
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●
●
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External components for buckboost configuration
Figure 8
by decoupling the center of the star from the analog ground of STLC3095 using small
chokes,
by adding a capacitor in the range of 100nF between VPOS and AGND in order to filter
the switch frequency on VPOS.
the AC input impedance shown by the SLIC at the line terminals “Zs” to which the
return loss measurement is referred. It can be real (typ. 600Ω) or complex.
the AC balance impedance, it is the equivalent impedance of the line “Zl” used for
evaluation of the trans-hybrid loss performances (2/4 wire conversion). It is usually a
complex impedance.
the value of the two protection resistors Rp in series with the line termination,
the slope of the ringing waveform “∆V
the value of the constant current limit current “Ilim”,
the value of the off-hook current threshold “I
the value of the ring trip rectified average threshold current “I
the value of the required self generated negative battery “V
value is 64V). This value can be obtained from the desired ring peak level + 5V.
the value of the maximum current peak drawn from Vpos “IPK”.
Function
).
RREF = 1.3/Ibias
Ibias = 50µA
CSVR = 1/(2π ⋅ fp ⋅ 1.8MΩ)
fp = 50Hz
Formula
TR
/∆
T
“,
TH
”,
BATR
RTH
” in ring mode (max
”,
1.5nF 10%
Typ. value
100kΩ 5%
26kΩ 1%
100V
Figure 7
STLC3095