mach110-24ji Lattice Semiconductor Corp., mach110-24ji Datasheet - Page 15
mach110-24ji
Manufacturer Part Number
mach110-24ji
Description
High-density Ee Cmos Programmable Logic
Manufacturer
Lattice Semiconductor Corp.
Datasheet
1.MACH110-24JI.pdf
(24 pages)
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Combinatorial
Registered
SWITCHING WAVEFORMS
Input, I/O,
Notes:
1. V
2. Input pulse amplitude 0 V to 3.0 V.
3. Input rise and fall times 2 ns–4 ns typical.
or Feed-
Registered
Output
Clock
Register
back
T
Output
Clock
Clock
Input
= 1.5 V.
Input
Registered Input (MACH 2 and 4)
Registered Output
t
WH
Clock Width
t
S
Combinatorial
t
SIR
Input, I/O, or
Feedback
Output
V
T
t
t
WL
CO
V
T
t
ICO
t
H
V
T
14127I-11
t
HIR
V
MACH110-12/15/20
V
14127I-9
T
T
14127I-13
V
T
Combinatorial Output
Input, I/O, or
Feedback
Latched
Registered
Gate
V
Out
Register
Register
T
Gate
Output
t
PD
Clock
Clock
Input
Input
Input Register to Output Register Setup
Latched Output (MACH 2, 3, and 4)
t
PDL
V
T
Gate Width (MACH 2, 3, and 4)
14127I-8
(MACH 2 and 4)
V
T
t
SL
t
GWS
V
t
ICS
T
t
V
HL
T
V
V
T
T
V
14127I-12
T
14127I-10
14127I-14
t
GO
V
T
15
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