ST62E25C ST Microelectronics, ST62E25C Datasheet - Page 19

• Manufacturer Part Number: ST62E25C
• Description: (ST62T15C / ST62T25C) 8-BIT OTP/EPROM MCUs WITH A/D CONVERTER
• Manufacturer: ST Microelectronics

5 CLOCKS, SUPPLY AND RESET
5.1 CLOCK SYSTEM
The main oscillator of the MCU can be driven by
any of these clock sources:
– external clock signal
– external AT-cut parallel-resonant crystal
– external ceramic resonator
– external RC network (R
In addition, an on-chip Low Frequency Auxiliary
Oscillator (LFAO) is available as a back-up clock
system or to reduce power consumption.
An optional Oscillator Safeguard (OSG) filters
spikes from the oscillator lines, and switches to the
LFAO backup oscillator in the event of main oscil-
lator failure. It also automatically limits the internal
clock frequency (f
to guarantee correct operation. These functions
are illustrated in
Figure 9. Clock Circuit Block Diagram
OSCILLATOR
MAIN
Figure
INT
) as a function of V
10, and
f
OSG ENABLE OPTION BIT (See OPTION BYTE SECTION)
OSC
NET
).
Figure
OSCILLATOR SAFEGUARD (OSG)
filtering
LFAO
OSG
DD
11.
, in order
(ADCR REGISTER)
OSCOFF BIT
Table 5
figurations using an external crystal or ceramic
resonator, an external clock input, an external re-
sistor (R
the LFAO.
For more details on configuring the clock options,
refer to the Option Bytes section of this document.
The internal MCU clock frequency (f
by 12 to drive the Timer, the Watchdog timer and
the A/D converter, by 13 to drive the CPU core and
the SPI and by 1 or 3 to drive the ARTIMER, as
shown in
With an 8 MHz oscillator, the fastest CPU cycle is
therefore 1.625µs.
A CPU cycle is the smallest unit of time needed to
execute any operation (for instance, to increment
the Program Counter). An instruction may require
two, four, or five CPU cycles for execution.
0
1
NET
illustrates various possible oscillator con-
Figure
Oscillator
Divider
), or the lowest cost solution using only
9.
f
INT
: 12
: 13
ST6215C/ST6225C
: 1
: 3
CORE
8-BIT TIMER
WATCHDOG
ADC
8-BIT ARTIMER
SPI
8-BIT ARTIMER
INT
) is divided
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