NCP361 ON Semiconductor, NCP361 Datasheet - Page 8

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NCP361

Manufacturer Part Number
NCP361
Description
USB Pos OVP And OCP
Manufacturer
ON Semiconductor
Datasheet

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Operation
voltage, up to 20 V. A PMOS FET protects the systems
(i.e.: VBUS) connected on the V
overvoltage. The Output follows the VBUS level until
OVLO threshold is overtaken.
Undervoltage Lockout (UVLO)
device has a built-in undervoltage lock out (UVLO)
circuit. During V
disconnected from input until V
nominal. The FLAGV output is pulled to low as long as V
does not reach UVLO threshold. This circuit has a 70 mV
hysteresis to provide noise immunity to transient condition.
Overvoltage Lockout (OVLO)
overvoltage, the device has a built-in overvoltage lock out
(OVLO) circuit. During overvoltage condition, the output
remains disabled until the input voltage exceeds 6.0 V.
OVLO. This circuit has a 100 mV hysteresis to provide
noise immunity to transient
Overcurrent Protection (OCP)
prevent system/battery overload or defect. The current
limit threshold is internally set at 750 mA. This value can
be changed from 150 mA to 750 mA by a metal tweak,
please contact your ON Semiconductor representative for
availability. During current fault, the internal PMOS FET
is automatically turned off (1 ms) if the charge current
exceeds I
as long as defect is present. The internal ton delay (4 ms
typical) allows limiting thermal dissipation. The Flag pin
goes to low level when an overcurrent fault appears. That
allows the microcontroller to count defect events and turns
off the PMOS with EN pin.
V
OVLO
OVLO
To ensure proper operation under any conditions, the
UVLO
UVLO
To protect connected systems on V
FLAG output is tied to low until V
The NCP361 integrates overcurrent protection to
in
NCP361 provides overvoltage protection for positive
20 V
V
(V)
out
0
0
Figure 20. Output Characteristic vs. V
lim
. NCP361 goes into turn on and turn off mode
in
positive going slope, the output remains
conditions.
in
out
voltage is above 3.0 V
pin, against positive
in
is higher than
out
in
pin from
http://onsemi.com
NCP361
in
8
FLAG Output
systems that a fault has occurred.
V
recovers normal condition, FLAG is held high. The pin is
an open drain output, thus a pull up resistor (typically 1 MW
- Minimum 10 kW) must be provided to V
an open drain output.
EN Input
to low or connected to ground. A high level on the pin
disconnects OUT pin from IN pin. EN does not overdrive
an OVLO or UVLO fault.
Internal PMOS FET
the systems, connected on OUT pin, from positive
overvoltage. Regarding electrical characteristics, the
R
V
ESD Tests
(Input pin, 1 mF mounted on board). That means, in Air
condition, V
Contact condition, V
Please refer to Figure 22 to see the IEC61000-4-2
electrostatic discharge waveform.
Overcurrent
out
in
DS(on)
NCP361 provides a FLAG output, which alerts external
This pin is tied to low as soon as: 1.2 V < V
To enable normal operation, the EN pin shall be forced
The NCP361 includes an internal PMOS FET to protect
The NCP361 fully supports the IEC61000-4-2, level 4
I
limit
V
> OVLO, I
pin, characterized by V
out
I
, during normal operation, will create low losses on
Figure 21. Overcurrent Event Example
t
off
in
charge
has a ±15 kV ESD protected input. In
> I
in
Figure 22.
limit
has ±8 kV ESD protected input.
t
on
, T
in
versus V
J
> 150°C. When NCP361
Retrieve normal
out
operation
CC
dropout.
. FLAG pin is
in
< UVLO,
t
t

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