ESD3V3U4ULC Infineon Technologies, ESD3V3U4ULC Datasheet
ESD3V3U4ULC
Specifications of ESD3V3U4ULC
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ESD3V3U4ULC Summary of contents
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... Transient Voltage Suppressor Diodes Ultra-low Capacitance ESD / Transient Protection Array ESD3V3U4ULC Revision 1.0, 2012-01-10 Final ...
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... Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life ...
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... TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited. Last Trademarks Update 2010-06-09 Final Data Sheet 3 Revision 1.0, 2012-01-10 ESD3V3U4ULC ...
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... Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 3.1 Electrical Characteristics at 3.2 Typical Characteristics at Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4 Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 6.1 PG-TSLP-9-1 (mm References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Final Data Sheet °C, unless otherwise specified . . . . . . . . . . . . . . . . . . . . . . . . . . °C, unless otherwise specified . . . . . . . . . . . . . . . . . . . . . . . . . . . ESD3V3U4ULC Table of Contents Revision 1.0, 2012-01-10 ...
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... 3 1MHz, from I/O to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Note from I/O to GND f I TLP TLP = ( ), from GND to I TLP TLP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 [3] 5 ESD3V3U4ULC List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 [2] Note [2] Revision 1.0, 2012-01-10 ...
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... Table 3 DC Characteristics at Table 4 RF Characteristics at Table 5 ESD Characteristics at Final Data Sheet = 25 °C, unless otherwise specified . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . °C, unless otherwise specified . . . . . . . . . . . . . . . . . . . . . . . . . . . . . °C, unless otherwise specified . . . . . . . . . . . . . . . . . . . . . . . . . . . . . °C, unless otherwise specified . . . . . . . . . . . . . . . . . . . . . . . . . . . . ESD3V3U4ULC List of Tables Revision 1.0, 2012-01-10 ...
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... Package ESD3V3U4ULC PG-TSLP-9-1 Final Data Sheet Ultra-low Capacitance ESD / Transient Protection Array = 3.3 V RWM = (typical 0.19 Ω (typical) R DYN Pin 4 Pin 5 Pin 7 Pin 6 Configuration 4 lines, uni-directional 7 ESD3V3U4ULC Pin 1 Pin 2 Pin 4 Pin 5 I/O I/O I/O I/O GND Pin 3 b) Schematic diagram Marking code Z2 Revision 1.0, 2012-01-10 ...
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... FC RWM I Trig I Hold - characteristics[ °C, unless otherwise specified T A Values Min. Typ. – – – ESD3V3U4ULC Characteristics Values Typ. Max. – 20 – 3 – 125 – 150 Dynamic resistance R DYN Triggering reverse voltage V Trig Clamping voltage V CL Holding reverse voltage ...
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... Min. Typ. Max. – 8 – – 11 – – 6 – – 9 – – 0.19 – – 0.23 – Ω 100ns ESD3V3U4ULC Characteristics Unit Note / Test Condition MHz I/O to GND MHz I MHz I/O to GND ...
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... I Figure 3 Reverse curent Figure 4 Reverse current: Final Data Sheet = 25 °C, unless otherwise specified [ [° 3 ESD3V3U4ULC Characteristics 3 4 100 125 150 Revision 1.0, 2012-01-10 ...
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... Figure 5 Line capacitance: 50 ESD3V3U4ULC Figure 6 Clamping voltage Final Data Sheet 1 1.5 [ 1MHz, from I/O to GND DYN 5 10 [V] TLP from I/O to GND TLP TLP 11 ESD3V3U4ULC Characteristics 2 2 =0.19Ω DYN Note: [2] Revision 1.0, 2012-01-10 3.5 ...
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... DYN 5 10 [V] TLP from GND to I/O TLP TLP 100 ns, = 300 ps, averaging window according IEC 61000-4 330 with ESD3V3U4ULC Characteristics =0.23Ω DYN Note: [ ns, extraction and PP1 PP2 Ω ...
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... To design USB3.0 link for best system level ESD performance and error free Signal Integrity is mandatory. To bring both requirements together, the ESD protection devices has to provide excellent ESD and a very low device capacitance. The Infineon ESD3V3U4ULC in “array” configuration, combined with a clear and straight forward “full through” layout fulfills these requirements in the best way. ...
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... LRH = TSLP S = SOT363 U = SC74 XX = Application family Low Clamp HDMI Uni- / Bi-directional or Rail to Rail protection Number of protected lines (i.e line lines) Capacitance: Standard (>10pF), Low (<10pF), Ultra-low (<1pF) Maximum working voltage V 14 ESD3V3U4ULC Ordering Information Scheme in V: (i.e.: 5V3 = 5.3V) RWM Revision 1.0, 2012-01-10 ...
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... 0.38 0.38 0.38 0.24 0.38 0.24 Copper Solder mask Stencil apertures 0.5 4 Pin 1 1.6 marking TSLP-9-1-TP V03 1234567 Type code Data code (YYWW) Pin 1 marking TSLP-9-1-MK V02 15 ESD3V3U4ULC Package Information 0. ±0.025 1) ±0.025 TSLP-9-1-PO V02 TSLP-9-1-FP V01 Revision 1.0, 2012-01-10 ...
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... On-chip ESD protection for integrated circuits, Albert Z. H. Wang, ISBN:0-7923-7647-1 [2] Infineon Technologie AG - Application Note AN210: Effective ESD Protection Design at System Level Using VF-TLP Characterization Methodology [3] Infineon Technologie AG - Application Note AN240: Effective ESD Protection for USB3.0, combined with perfect Signal Intergrity. Final Data Sheet 16 ESD3V3U4ULC References Revision 1.0, 2012-01-10 ...
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... Electrostatic discharge voltage V ESD Forward Clamping Voltage V FC Holding Voltage V Hold Equivalent stress level according IEC61000-4 IEC Reverse voltage V R Reverse working voltage maximum V RWM Triggering Voltage V Trig Impedance Z 0 Final Data Sheet = 330 Ω 150 pF ESD3V3U4ULC Terminology Revision 1.0, 2012-01-10 ...
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... Published by Infineon Technologies AG ...