AD9751 Analog Devices, AD9751 Datasheet - Page 17
AD9751
Manufacturer Part Number
AD9751
Description
Manufacturer
Analog Devices
Datasheet
1.AD9751.pdf
(28 pages)
Specifications of AD9751
Resolution (bits)
10bit
Dac Update Rate
300MSPS
Dac Settling Time
11ns
Max Pos Supply (v)
+3.6V
Single-supply
Yes
Dac Type
Current Out
Dac Input Format
Par
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The center tap on the primary side of the transformer must be
connected to ACOM to provide the necessary dc current path
for both I
at I
around ACOM and should be maintained with the specified
output compliance range of the AD9751. A differential resistor,
R
transformer is connected to the load, R
struction filter or cable. R
impedance ratio and provides the proper source termination that
results in a low VSWR.
DIFFERENTIAL COUPLING USING AN OP AMP
An op amp can also be used to perform a differential-to-
single-ended conversion, as shown in Figure 21. The AD9751
is configured with two equal load resistors, R
differential voltage developed across I
verted to a single-ended signal via the differential op amp
configuration. An optional capacitor can be installed across
I
addition of this capacitor also enhances the op amp’s distortion
performance by preventing the DAC’s high slewing output from
overloading the op amp’s input.
T
determined by the resistor matching. In this circuit, the dif-
ferential op amp circuit using the AD8047 is configured to
provide some additional signal gain. The op amp must operate
from a dual supply since its output is approximately ± 1.0 V.
A high speed amplifier capable of preserving the differential
performance of the AD9751, while meeting other system-
level objectives (i.e., cost, power), should be selected. The op
amp’s differential gain, gain setting resistor values, and full-
scale output swing capabilities should all be considered when
optimizing this circuit.
The differential circuit shown in Figure 22 provides the nec-
essary level-shifting required in a single-supply system. In this
case, AVDD, which is the positive analog supply for both the
AD9751 and the op amp, is also used to level-shift the differ-
ential output of the AD9751 to midsupply (i.e., AVDD/2). The
AD8041 is a suitable op amp for this application.
REV. C
OUTA
DIFF
he common-mode rejection of this configuration is typically
Figure 21. DC Differential Coupling Using an Op Amp
OUTA
, may be inserted into applications where the output of the
and I
and I
OUTA
AD9751
OUTB
OUTB
and I
I
I
OUTA
OUTB
, forming a real pole in a low-pass filter. The
(i.e., V
OUTB
25
. The complementary voltages appearing
OUTA
DIFF
C
OPT
is determined by the transformer’s
and V
25
225
225
500
OUTB
OUTA
LOAD
) swing symmetrically
, via a passive recon-
and I
LOAD
AD8047
500
, of 25 Ω. The
OUTB
is con-
–17–
SINGLE-ENDED UNBUFFERED VOLTAGE OUTPUT
Figure 23 shows the AD9751 configured to provide a unipolar
output range of approximately 0 V to 0.5 V for a doubly-termi-
nated 50 Ω cable, since the nominal full-scale current, I
20 mA flows through the equivalent R
R
I
ACOM directly or via a matching R
I
pliance range is adhered to. One additional consideration in
this mode is the integral nonlinearity (INL), as discussed in the
Analog Outputs section. For optimum INL performance, the
single-ended, buffered voltage output configuration is suggested.
SINGLE-ENDED BUFFERED VOLTAGE OUTPUT
Figure 24 shows a buffered single-ended output configuration in
which the op amp performs an I–V conversion on the AD9751
output current. The op amp maintains I
virtual ground, thus minimizing the nonlinear output impedance
effect on the DAC’s INL performance as discussed in the
Analog Output section. Although this single-ended configura-
tion typically provides the best dc linearity performance, its ac
distortion performance at higher DAC update rates may be
limited by the op amp’s slewing capabilities. The op amp pro-
vides a negative unipolar output voltage and its full-scale output
voltage is simply the product of R
output should be set within the op amp’s voltage output swing
capabilities by scaling I
distortion performance may result with a reduced I
the signal current the op amp will be required to sink will subse-
quently be reduced.
OUTB
OUTFS
Figure 22. Single-Supply DC Differential Coupled Circuit
LOAD
Figure 23. 0 V to 0.5 V Unbuffered Voltage Output
. The unused output (I
represents the equivalent load resistance seen by I
and R
AD9751
AD9751
I
I
LOAD
OUTA
OUTB
I
I
OUTA
OUTB
25
can be selected as long as the positive com-
I
OUTFS
OUTFS
C
OPT
25
= 20mA
OUTA
and/or R
25
225
225
50
FB
or I
LOAD
and I
1k
OUTB
LOAD
FB
. An improvement in ac
. Different values of
AD8041
OUTFS
OUTA
500
) can be connected to
of 25 Ω. In this case,
V
OUTA
1k
(or I
. The full-scale
AD9751
50
= 0V TO 0.5V
OUTFS
OUTB
AVDD
OUTFS
, since
OUTA
) at a
, of
or