PM7366-BI PMC-Sierra Inc, PM7366-BI Datasheet
PM7366-BI
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PM7366-BI Summary of contents
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... RELEASED DATA SHEET PMC-1970930 EIGHT CHANNEL FRAME ENGINE AND DATALINK MANAGER PROPRIETARY AND CONFIDENTIAL PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM™-8 ISSUE 4: AUGUST 2001 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER ...
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... Updated to include PBGA package option · Addition of new pinout, pin description, and mechanical diagram. Incorporated Documentation Errata from PMC-980452, “PM7366 FREEDM-8 Revision D Device Errata Sheet” Issue 4. Updated for Freedm-8 Release to Production Document created for Prototype release PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER ...
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... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 LINE INTERFACE............................................................................. 34 PRIORITY ENCODER...................................................................... 34 CHANNEL ASSIGNER ..................................................................... 35 LOOPBACK CONTROLLER ............................................................ 35 HDLC PROCESSOR ........................................................................ 36 PARTIAL PACKET BUFFER PROCESSOR..................................... 36 DATA STRUCTURES ....................................................................... 38 DMA TRANSACTION CONTROLLER ............................................. 48 WRITE DATA PIPELINE/MUX .......................................................... 48 DESCRIPTOR INFORMATION CACHE........................................... 48 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER i ...
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... ERROR / BUS CONTROL................................................................ 54 DATA STRUCTURES ....................................................................... 55 TASK PRIORITIES ........................................................................... 66 DMA TRANSACTION CONTROLLER ............................................. 66 READ DATA PIPELINE..................................................................... 66 DESCRIPTOR INFORMATION CACHE........................................... 66 FREE QUEUE CACHE..................................................................... 66 TRANSMIT HDLC PROCESSOR..................................................... 67 TRANSMIT PARTIAL PACKET BUFFER PROCESSOR ................. 67 LINE INTERFACE............................................................................. 70 PRIORITY ENCODER...................................................................... 70 CHANNEL ASSIGNER ..................................................................... 71 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER ii ...
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... D.C. CHARACTERISTICS ............................................................................................ 261 17 FREEDM-8 TIMING CHARACTERISTICS ................................................................... 263 18 ORDERING AND THERMAL INFORMATION .............................................................. 269 19 MECHANICAL INFORMATION..................................................................................... 270 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 IDENTIFICATION REGISTER ........................................................ 228 BOUNDARY SCAN REGISTER ..................................................... 228 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER iii ...
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... REGISTER 0X208 : RHDL INDIRECT CHANNEL DATA REGISTER #2 .................................. 122 REGISTER 0X210 : RHDL INDIRECT BLOCK SELECT .......................................................... 124 REGISTER 0X214 : RHDL INDIRECT BLOCK DATA ............................................................... 126 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER iv ...
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... REGISTER 0X2BC : RMAC PACKET DESCRIPTOR REFERENCE READY QUEUE WRITE 151 REGISTER 0X2C0 : RMAC PACKET DESCRIPTOR REFERENCE READY QUEUE READ .. 152 REGISTER 0X2C4 : RMAC PACKET DESCRIPTOR REFERENCE READY QUEUE END..... 153 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER v ...
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... REGISTER 0X400 : TCAS INDIRECT LINK AND TIME-SLOT SELECT .................................. 189 REGISTER 0X404 : TCAS INDIRECT CHANNEL DATA........................................................... 191 REGISTER 0X408 : TCAS FRAMING BIT THRESHOLD ......................................................... 193 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER vi ...
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... REGISTER 0X0C : CACHE LINE SIZE/LATENCY TIMER/HEADER TYPE ............................. 222 REGISTER 0X10 : CBI MEMORY BASE ADDRESS REGISTER ............................................. 223 REGISTER 0X3C : INTERRUPT LINE / INTERRUPT PIN / MIN_GNT / MAX_LAT ................. 225 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER vii ...
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... FIGURE 21 – TAP CONTROLLER FINITE STATE MACHINE .................................................. 244 FIGURE 22 – UNCHANNELISED RECEIVE LINK TIMING ...................................................... 248 FIGURE 23 – CHANNELISED T1 RECEIVE LINK TIMING ...................................................... 248 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER viii ...
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... FIGURE 43 – JTAG PORT INTERFACE TIMING...................................................................... 268 FIGURE 44 – 256 PIN ENHANCED BALL GRID ARRAY (SBGA)............................................. 270 FIGURE 45 – 272 PIN PLASTIC BALL GRID ARRAY (PBGA).................................................. 271 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER ix ...
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... TABLE 19 – RPQ_RDYN[2:0] SETTINGS ................................................................................. 132 TABLE 20 – RPQ_LFN[1:0] SETTINGS .................................................................................... 133 TABLE 21 – RPQ_SFN[1:0] SETTINGS .................................................................................... 133 TABLE 22 – TDQ_RDYN[2:0] SETTINGS ................................................................................. 155 TABLE 23 – TDQ_FRN[1:0] SETTINGS .................................................................................... 155 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER x ...
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... TABLE 36 – PCI INTERFACE (FIGURE 42) .............................................................................. 266 TABLE 37 – JTAG PORT INTERFACE (FIGURE 43)................................................................ 267 TABLE 38 – FREEDM-8 ORDERING INFORMATION .............................................................. 269 TABLE 39 – FREEDM-8 THERMAL INFORMATION................................................................. 269 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER xi ...
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... Directly supports a 32-bit, 33 MHz PCI 2.1 interface for configuration, monitoring and transfer of packet data, with an on-chip DMA controller with scatter/gather capabilities. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 1 ...
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... Low power CMOS technology. · 256 pin enhanced ball grid array (SBGA) or 272 pin plastic ball grid array (PBGA) packages ( mm). PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 2 ...
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... FUNI or Frame Relay service inter-working interfaces for ATM switches and multiplexors. · D-channel processing in ISDN terminals and switches. · Internet/Intranet access equipment. · Packet-based DSLAM equipment. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 3 ...
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... RFC-1662 - "PPP in HDLC-like Framing" Internet Engineering Task Force, July 1994. 3. PCI Special Interest Group, PCI Local Bus Specification, June 1, 1995, Version 2.1. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 4 ...
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... ATM CELL BASED UPLINK SIDE PM7366 FREEDM-8 SAR PCI Bus Packet Micro- Memory processor PM7322 RCMP Processor Module PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER HDLC BASED UPLINK SIDE HSSI HSSI Module DS3/E3 Framer LIU DS3/E3/J2 HDLC Based Uplink Module ...
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... RELEASED DATA SHEET PMC-1970930 5 BLOCK DIAGRAM . RSTB RBCLK RBD PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER PMCTEST TDO TDI TCK TMS TRSTB TBCLK TBD 6 ...
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... PMC-1970930 6 DESCRIPTION The PM7366 FREEDM-8 Frame Engine and Datalink Manager device is a monolithic integrated circuit that implements HDLC processing, and PCI Bus memory management functions for a maximum of 128 bi-directional channels. For channelised links, the FREEDM-8 allows up to 128 bi-directional HDLC channels to be assigned to individual time-slots within a maximum of 8 independently timed links ...
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... The FREEDM-8 is available in two package options; a 256 pin enhanced ball grid array (SBGA) package 272 pin plastic ball grid array (PBGA) package. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 8 ...
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... RELEASED DATA SHEET PMC-1970930 7 PIN DIAGRAM The PM7366-BI FREEDM-8 is manufactured in a 256 pin enhanced ball grid array (SBGA) package VSS VSS VSS X X TA[2] B VSS VDD VDD X TA[ VSS VDD VDD RD[7] X TA[1] D RD[5] RCLK[5] RCLK[6] EN5V RCLK[ RD[3] RCLK[3] RCLK[4] ...
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... RELEASED DATA SHEET PMC-1970930 The PM7366-PI FREEDM-8 is manufactured in a 272 pin plastic ball grid array (PBGA) package VSS VBIAS[2] NC PCICLK VDD PCICLKO AD[29] AD[31] GNTB VSS X VDD E AD[25] AD[28] AD[30] REQB F IDSEL AD[24] AD[27] VDD G AD[22] AD[23] CBEB[3] AD[26] H AD[19] AD[20] AD[21] VSS J CBEB[2] AD[16] AD[17] AD[18] K DEVSELB ...
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... HDLC packet). RCLK[2:0] is nominally a 50% duty cycle clock between 0 and 52 MHz. RCLK[7:3] is nominally a 50% duty cycle clock between 0 and 10 MHz. PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 11 ...
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... The receive BERT clock signal (RBCLK) contains the receive bit error rate test clock. RBCLK is a buffered version of the selected one of the receive clock signals (RCLK[7:0]). RBCLK may be tri-stated by setting the RBEN bit in the FREEDM-8 Master BERT Control register low. PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 12 ...
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... HDLC packet). TCLK[7:3] is nominally a 50% duty cycle clock between 0 and 10 MHz. TCLK[2:0] is nominally a 50% duty cycle clock between 0 and 52 MHz. Typical values for TCLK[7:0] include 1.544 MHz (for T1 links) and 2.048 MHz (for E1 links). PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 13 ...
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... The transmit BERT clock signal (TBCLK) contains the transmit bit error rate test clock. TBCLK is a buffered version of the selected one of the transmit clock signals (TCLK[7:0]). TBCLK may be tri-stated by setting the TBEN bit in the FREEDM-8 Master BERT Control register low. PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 14 ...
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... G19 H4 transaction. For read transactions, AD[31: F19 F2 output bus during the data phases. E20 F3 G17 E1 When the FREEDM-8 is not involved in the current F18 E2 transaction, AD[31:0] is tri-stated. E19 F4 E3 D20 E18 D1 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 15 ...
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... When the FREEDM-8 is the target, C/BEB[3: input bus. When the FREEDM-8 is not involved in the current transaction, C/BEB[3:0] is tri-stated output bus, C/BEB[3:0] is updated on the rising edge of PCICLK input bus, C/BEB[3:0] is sampled on the rising edge of PCICLK. PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 16 ...
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... When the FREEDM-8 is the target, FRAMEB is an input. When the FREEDM-8 is not involved in the current transaction, FRAMEB is tri-stated output signal, FRAMEB is updated on the rising edge of PCICLK input signal, FRAMEB is sampled on the rising edge of PCICLK. PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 17 ...
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... TRDYB is set high to extend data phases over multiple PCICLK cycles. When the FREEDM-8 is not involved in the current transaction, TRDYB is tri-stated output signal, TRDYB is updated on the rising edge of PCICLK input signal, TRDYB is sampled on the rising edge of PCICLK. PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 18 ...
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... When the FREEDM-8 is the target, IRDYB is an input. When the FREEDM-8 is not involved in the current transaction, IRDYB is tri-stated. IRDYB is updated on the rising edge of PCICLK or sampled on the rising edge of PCICLK depending on whether output or an input. PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 19 ...
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... C/BEB[3:0] code indicates a register read or write, the FREEDM-8 performs a PCI configuration register transaction and asserts the DEVSELB signal in the next PCICLK period. IDSEL is sampled on the rising edge of PCICLK. PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 20 ...
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... The active low PCI bus request signal (REQB) requests an external arbiter for control of the PCI bus. REQB is set low when the FREEDM-8 desires access to the host memory. REQB is set high when access is not desired. REQB is updated on the rising edge of PCICLK. PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 21 ...
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... Control/Status register in the PCI Configuration registers space. Regardless of the setting of PERREN, parity errors are always reported by the PERR bit in the Control/Status register in the PCI Configuration registers space. PERRB is updated on the rising edge of PCICLK. PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 22 ...
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... Regardless of the setting of SERREN, parity errors are always reported by the SERR bit in the Control/Status register in the PCI Configuration registers space. SERRB is an open drain output and is updated on the rising edge of PCICLK. PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 23 ...
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... The test data output signal (TDO) carries test data out of the FREEDM-8 via the IEEE P1149.1 test access port. TDO is updated on the falling edge of TCK. TDO is a tri-state output which is inactive except when scanning of data is in progress. PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 24 ...
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... C15 registers during production test (PMCTEST set high) A6 A15 read and write accesses. A7 D13 In normal operation (PMCTEST set low), TA[10:0] B8 A14 should be tied high. D9 D12 B9 C12 D10 A12 B10 C11 A11 A11 B11 B10 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 25 ...
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... FREEDM-8 V7 V14 registers during production test. Y7 W14 In normal operation (PMCTEST set low), TDAT[15:0] W8 V13 should be left unconnected. U9 U12 W9 V12 W10 W11 Y10 Y10 W11 V10 U11 Y9 W12 V9 U12 U9 W13 Y7 Y14 U8 Y15 Y6 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 26 ...
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... B16 W17 C5 V16 C6 W16 C7 V15 C8 Y15 C9 U13 C10 Y14 C11 W13 C12 Y13 C13 W12 C14 V11 C15 W10 C16 U10 D14 W9 D16 A17 U7 D15 U16 A16 V5 B15 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 27 ...
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... Optionally, they may be V10 C13 left floating. V11 B13 V12 B12 V13 D11 V14 B11 V16 C10 W14 B8 W17 Y11 C5 Y12 B4 Y13 U5 Y17 Y4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 28 ...
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... The No-Connect pins NC must be left unconnected. A3 R18 A18 T19 A19 T18 B1 U19 B2 U18 B3 U16 B18 Y17 B20 U15 C1 C2 C19 C20 D3 P17 V17 V19 V20 W18 W20 Y18 Y19 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 29 ...
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... C18 B3 decoupled +3 supply. D6 B18 D11 B19 D15 F17 C18 K4 C19 L17 D7 R4 D10 R17 D14 U6 G4 U10 G17 U15 K17 V3 L4 V18 P4 P17 U7 U11 U14 V2 V3 V18 V19 W2 W3 W18 W19 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 30 ...
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... J11 B20 J12 C1 K9 C20 K10 H1 K11 J20 K12 K20 L9 L1 L10 M1 L11 N20 L12 V1 M9 V20 M10 W1 M11 W20 M12 N17 Y11 U13 Y12 U17 Y18 Y1 Y19 Y20 Y20 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 31 ...
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... Inputs TMS, TDI, TRSTB and EN5V are Schmitt triggered and have internal pull-up resistors. 5. Inputs RD[7:0], RCLK[7:0], TCLK[7:0], SYSCLK, PCICLK, TBD, RSTB, GNTB, IDSEL, LOCKB, TCK and PMCTEST are Schmitt triggered. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 32 ...
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... The first FCS bit received is the residue of the highest term. Figure 2 – CRC Generator LSB PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 FCS HDLC Packet Parity Check Digits PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER Flag Flag g n-1 Message D n-1 MSB 33 ...
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... SYSCLK timing domain. Requests are serviced on a fixed priority scheme where highest to lowest priority is assigned from the line interface attached to RD[0] to that attached to RD[7]. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 34 ...
Page 48
... A channel FIFO can be assigned a minimum of 3 blocks (48 bytes) and a maximum of 512 blocks (8 Kbytes). The depth PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 35 ...
Page 49
... If a buffer over-run occurs, the writer ends the current packet from the HDLC processor in the channel FIFO with an over-run flag and ignores the rest of the packet. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 36 ...
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... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Block 0 Block 1 Block 2 Block 3 Block 200 Block 511 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER Block Pointer RAM XX 0x03 XX 0xC8 0x01 ...
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... RPDRF queues allow the RMAC and the host to pass RPDRs back and forth. These data structures are described in more detail in the following sections. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 38 ...
Page 52
... Ready Queue. When a packet requires only one RPD, the CE bit is set to logic one. The CE bit is ignored for all RPDs read by the RMAC from the Receive Free Queues, each of which is assumed to point to only one buffer, i.e. not a chain. PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 0 CE ...
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... RPD's data buffer. This field is expected to be configured by the Host during initialisation. The Receive Buffer Size must be a non- zero integer multiple of 16 and less than or equal to 32752. The Receive Buffer Size field is valid in all RPDs. PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 40 ...
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... Packet Descriptor Reference (RPDR) which is a 14-bit pointer defining the offset of a RPD from the table base. Thus, as shown in the following diagram, a RPD can be located by adding the RPDR to the Rx Packet Descriptor Table Base register. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 41 ...
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... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Bit 31 RPDTB[31:4] + RPDR[13:0] = RPD_ADDR[31:0] Bit 31 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER Bit 0 0000 0000 Bit 0 Dword 0 Dword 1 Dword 2 Dword 3 Dword 0 ...
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... A queue is full when the read index is equal to the write index. Figure 6 shows the RPDR reference queues. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 43 ...
Page 57
... RPDRSFQE[15:0] = RPDR Small Free Queue End register Base Address + Index Register ------------------------- Host Address Bit 0 RQB RPDR RPDR RPDR RPDR RPDR RPDR RPDR RPDR RPDR RPDR RPDR RPDR PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER RQB[31: Index[15:0] 00 AD[31:0] Host Memory 256KB RPD Reference Queues Valid RPDR 44 ...
Page 58
... RMAC block writes a STATUS+RPDR to the ready queue, it sets the third byte to 0 and the fourth (most significant) byte is unmodified. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 RPDR[13: Successful reception of packet Unsuccessful reception of packet Unprovisioned partial packet Reserved. PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER Bit 0 45 ...
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... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Bit 31 Bit 0 RPD - 16 bytes STATUS + RPDR STATUS + RPDR RPD - 16 bytes STATUS + RPDR RPD - 16 bytes RPD - 16 bytes RPD - 16 bytes PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER buffer -packet M buffer -packet N buffer -start of packet O buffer -middle of packet O ...
Page 60
... This field contains the pointer to the current RPD. This field contains the size in bytes of the buffer currently being written to. PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER Bit 0 RPD Pointer[13:0] Start RPD Pointer[13:0] ...
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... This field contains the pointer to the first RPD for the packet being received. The DMA Current Address [31:0] bits holds the host address of the next dword in the current buffer. The RMAC increments this field on each access to the buffer. PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 48 ...
Page 62
... Before asserting the PCI Request line, the GPIC first does an internal arbitration to determine the priority of service in the event that both the RMAC and TMAC are requesting PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 49 ...
Page 63
... FIFO is requesting service, in which case if the GRANT is asserted the GPIC will insert one idle cycle on the bus and then start a new transfer. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 50 ...
Page 64
... PCI bus data to be changed. If enabled, the GPIC will swizzle all packet data on the PCI bus (but not descriptor references and the contents of descriptors). The swizzling is PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 51 ...
Page 65
... The FREEDM will also disconnect on every read and write access to configuration space after transferring one Dword of data. Figure 9 illustrates the GPIC address space. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 52 ...
Page 66
... Target-Abort termination only in the case of an address parity error in an address that the GPIC claims. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PCI ADDRESS MAP 0B CBI Registers 4GB PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 4KB 53 ...
Page 67
... To minimise host bus accesses, the TMAC maintains a descriptor reference table to store current DMA information. This table contains separate DMA information entries for up to 128 transmit PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 54 ...
Page 68
... The Data Buffer Start Address field is valid in all TDs The Bytes In Buffer[15:0] field is used by the host to indicate the total number of bytes to be transmitted in the current TD. Zero length buffers are illegal. PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER Bit ...
Page 69
... M=0, CE=1 for the last TD in the chain. The Transmit Channel Code (TCC[6:0]) field is used by the host to indicate with which channel associated. All chain must be associated with the same channel, i.e. have this field set to the same value. PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 56 ...
Page 70
... TD packets or multiple packets associated with the same channel and priority level to the TMAC. The Transmit Buffer Size[15:0] field is used to indicate the size in bytes of the current TD's data buffer. (N.B. The TMAC does not make use of this field.) PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 57 ...
Page 71
... ISSUE 4 TDTB[31: Descriptor Table Base register TDR[13:0] = Transmit Descriptor Reference TD_ADDR[31:0] = Transmit Descriptor Address Bit 31 TDTB[31:4] + TDR[13:0] = TD_ADDR[31:0] Bit 31 TD1 TD2 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER Bit 0 0000 0000 Bit 0 Dword 0 Dword 1 Dword 2 Dword 3 Dword 0 Dword 3 Dword 0 Dword 3 ...
Page 72
... An end pointer must not be set to 0 hex in an attempt to include offset 3FFFC hex in a queue. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 59 ...
Page 73
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Base Address + Index Register ------------------------- PCI Address Bit 0 TQB TDR TDR TDR TDR TDR TDR PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER TQB[31: Index[15:0] 00 AD[31:0] PCI Host Memory 256KB TDR Reference Queues Valid TDR. Only least significant 17 bits are valid. ...
Page 74
... Last or only buffer of packet, buffer read. Buffer of partial packet, buffer read. Unprovisioned channel, buffer not read. Malformed packet (e.g. Bytes In Buffer field set to 0), buffer not read. Description No underflow detected. Underflow detected. PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER Bit 0 61 ...
Page 75
... Description A copy of the M bit in the TD currently being read. A copy of the CE bit in the TD currently being read. Offset to the head of the last host-linked chain of TDs to be read. (See Figure 14) PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER Bit 0 D Current TD Pointer [13:0] Host TD Pointer [13:0] ...
Page 76
... TD pointer fields are valid. If the V bit is set to logic 0, the list is either empty or contains only one host-linked chain and the next and last TD pointer fields are invalid. Offset to the head of the next host-linked chain of TDs to be read. (See Figure 14) PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 63 ...
Page 77
... Whenever a new data packet is requested by the downstream block, the TMAC picks a packet from the high-priority linked list unless it is empty, in which case, a packet from the low- priority linked list is used. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 64 ...
Page 78
... P3. The TMAC indicates valid horizontal links by setting the V bit to logic 1. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE V=1 TMAC Link M=1 CE=0 Data Host Link M=1 CE=0 Data TD P1 M=0 CE=0 Data TD P2 M=0 CE=1 Data PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER TD P4 TMAC Link V=1 V=0 M=1 M=0 CE=0 CE=1 Data M=0 CE=1 Data 65 ...
Page 79
... TD is released as the result of unprovisioning a channel. The cache controller may also flush the cache when it contains fewer than six elements or if the pointer index is within six PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 66 ...
Page 80
... When a channel is provisioned with this FIFO, the state machine can be initialised to point to any one of the three blocks. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 67 ...
Page 81
... FIFO. Recording the number of empty blocks PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Block 0 Block 1 Block 2 Block 3 Block 200 Block 511 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER Block Pointer RAM XX 0x03 XX 0xC8 0x01 ...
Page 82
... With knowledge of the transmit link and time-slot identity, the TCAS performs a table look-up to identify the channel from which a data byte sourced. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 69 ...
Page 83
... SYSCLK cycle, the priority encoder inserts a null cycle where no requests are serviced. This cycle is used by the channel assigner downstream for CBI accesses to the channel provision RAM. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 70 ...
Page 84
... PCI Interface address. The base address can be found in the FREEDM-8 Memory Base Address register in the PCI Configuration memory space. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 71 ...
Page 85
... RHDL Indirect Channel Data Register #2 0x20C RHDL Reserved 0x210 RHDL Indirect Block Select 0x214 RHDL Indirect Block Data Register 0x218 RHDL Reserved 0x21C RHDL Reserved PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 72 ...
Page 86
... TMAC Descriptor Table Base MSW 0x310 TMAC Queue Base LSW 0x314 TMAC Queue Base MSW 0x318 TMAC Descriptor Reference Free Queue Start PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 73 ...
Page 87
... TCAS Framing Bit Threshold 0x40C TCAS Idle Time-slot Fill Data and Config. 0x410 TCAS Channel Disable 0x414 - 0x47C TCAS Reserved 0x480 TCAS Link #0 Configuration PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 74 ...
Page 88
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Register Vendor Identification/Device Identification Command/Status Revision Identifier/Class Code Cache Line Size/Latency Timer/Header Type/BIST CBI Memory Base Address Register Unused Base Address Register Reserved Reserved Reserved Reserved Reserved Interrupt Line/Interrupt Pin/MIN_GNT/MAX_LAT PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 75 ...
Page 89
... Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all four byte enables are negated, no access is made to the register. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 76 ...
Page 90
... Therefore, a logic zero must be written to bring the FREEDM-8 out of reset. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH Reset 0 Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 77 ...
Page 91
... Transmit link data pins (TD[7:0]) are forced high. In addition, all registers except the GPIC PCI Configuration registers, are reset to their default values. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 78 ...
Page 92
... PCIINTB output. Interrupts are masked when SERRE is set low. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH TFUDRE 0 IOCE 0 TDFQEE 0 TDQRDYE 0 TDQFE 0 RPDRQEE 0 RPDFQEE 0 RPQRDYE 0 RPQLFE 0 RPQSFE 0 RFOVRE 0 RPFEE 0 RABRTE 0 RFCSEE 0 PERRE 0 SERRE 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 79 ...
Page 93
... PCIINTB output. Interrupts are masked when RFOVRE is set low. However, the RFOVRI bit remains valid when interrupts are disabled and may be polled to detect receive FIFO overrun events. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 80 ...
Page 94
... PCIINTB output. Interrupts are masked when RPDRQEE is set low. However, the RPDRQEI bit remains valid when interrupts are disabled and may be polled to detect RPDR ready queue full error events. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 81 ...
Page 95
... PCIINTB output. Interrupts are masked when TFUDRE is set low. However, the TFUDRI bit remains valid when interrupts are disabled and may be polled to detect transmit FIFO underflow events. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 82 ...
Page 96
... Special Cycle commands, reception of a master abort or detection of a target abort event. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH TFUDRI X IOCI X TDFQEI X TDQRDYI X TDQFI X RPDRQEI X RPDFQEI X RPQRDYI X RPQLFI X RPQSFI X RFOVRI X RPFEI X RABRTI X RFCSEI X PERRI X SERRI X PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 83 ...
Page 97
... RPDR Small Buffer Free Queue. RPQSFI remains valid when interrupts are disabled and may be polled to detect RPDR small buffer free queue cache read events. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 84 ...
Page 98
... The transmit descriptor free queue error interrupt status bit (TDFQEI) reports transmit descriptor free queue error interrupts to the PCI host. TDFQEI is set high when an attempt to PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 85 ...
Page 99
... FIFO when it is already empty. TFUDRI remains valid when interrupts are disabled and may be polled to detect transmit FIFO underflow events. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 86 ...
Page 100
... The bits in this register are not affected by write accesses. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X TBDA X SYSCLKA X PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 87 ...
Page 101
... The transmit BERT data active bit (TBDA) monitors for low to high transitions on the TBD input. TBDA is set high on a rising edge of TDB, and is set low when this register is read. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 88 ...
Page 102
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH Unused X Unused X Unused X Unused X Unused X Unused X TLGA[1] X TLGA[0] X Unused X Unused X Unused X Unused X Unused X Unused X RLGA[1] X RLGA[0] X PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 89 ...
Page 103
... TCLK[7:4] inputs. TLGA[1] is set high when rising edges have been observed on all the signals on the TCLK[7:4] inputs, and is set low when this register is read. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 90 ...
Page 104
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH Reserved[7] 0 Reserved[6] 0 Reserved[5] 0 Reserved[4] 0 Reserved[3] 0 Reserved[2] 0 Reserved[1] 0 Reserved[0] 0 LLBEN[7] 0 LLBEN[6] 0 LLBEN[5] 0 LLBEN[4] 0 LLBEN[3] 0 LLBEN[2] 0 LLBEN[1] 0 LLBEN[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 91 ...
Page 105
... RELEASED DATA SHEET PMC-1970930 Reserved[7:0]: The reserved bits (Reserved[7:0]) must be set low for the correct operation of the FREEDM-8 device. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 92 ...
Page 106
... RBD and RBCLK outputs. RBSEL[2:0] is ignored when RBEN is set low. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH TBEN 0 Unused X Unused X Reserved[3] 0 Reserved[2] 0 TBSEL[2] 0 TBSEL[1] 0 TBSEL[0] 0 RBEN 0 Unused X Unused X Reserved[1] 0 Reserved[0] 0 RBSEL[2] 0 RBSEL[1] 0 RBSEL[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 93 ...
Page 107
... When TBEN is set low, all transmit links are processed normally and TBCLK is held tri-stated. Reserved[3:0]: The reserved bits (Reserved[3:0]) must be set low for the correct operation of the FREEDM-8 device. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 94 ...
Page 108
... Unspecified CRC or no CRC bits (CRC-32) will PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH Unused X TP2EN 0 TABRT2EN 0 RP2EN 0 RLENE2EN 0 RABRT2EN 0 RFCSE2EN 0 RSPE2EN 0 Unused X TP1EN 0 TABRT1EN 0 RP1EN 0 RLENE1EN 0 RABRT1EN 0 RFCSE1EN 0 RSPE1EN 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 95 ...
Page 109
... The receive small packet error accumulate enable bit (RSPE2EN) enables counting of minimum packet size violation events. When RSPE2EN is set high, receipt of a packet that is PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 96 ...
Page 110
... When TP2EN is set high, transmission of an error-free packet will cause the PMON Configurable Accumulator #2 register to increment. Transmit error-free packets are ignored when TP2EN is set low. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 97 ...
Page 111
... PCI host memory. When LENDIAN PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH Unused X Unused X Unused X RPWTH[4] 0 RPWTH[3] 0 RPWTH[2] 0 RPWTH[1] 0 RPWTH[0] 0 Unused X Unused X Unused X Unused X PONS_E 0 SOE_E 0 LENDIAN 1 Reserved 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 98 ...
Page 112
... BYTE n-4 BYTE n-3 Bit BYTE 3 BYTE 2 BYTE 7 BYTE 6 • • • • • • BYTE n-1 BYTE n-2 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER BYTE 2 BYTE 3 BYTE 6 BYTE 7 • • • • • • BYTE n-2 BYTE n ...
Page 113
... FIFO before the GPIC begins arbitrating for the bus. The GPIC will begin requesting access to the PCI bus when the number of dwords of packet data loaded by the RMAC reaches the threshold specified by RPWTH[4:0]. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 100 ...
Page 114
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH BUSY X RWB 0 Unused X Reserved[1] 0 Reserved[0] 0 LINK[2] 0 LINK[1] 0 LINK[0] 0 Unused X Unused X Unused X TSLOT[4] 0 TSLOT[3] 0 TSLOT[2] 0 TSLOT[1] 0 TSLOT[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 101 ...
Page 115
... Channel Data register or to determine when a new indirect write operation may commence. Reserved[1:0]: The reserved bits (Reserved[1:0]) must be set low for the correct operation of the FREEDM-8 device. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 102 ...
Page 116
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH Unused X Unused X Unused X Unused X Unused X Unused X CDLBEN 0 PROV 0 Unused X CHAN[6] 0 CHAN[5] 0 CHAN[4] 0 CHAN[3] 0 CHAN[2] 0 CHAN[1] 0 CHAN[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 103 ...
Page 117
... FIFO of the channel as indicated by CHAN[6:0]. When CDLBEN is set low, the current receive data byte is processed normally. CDLBEN reflects the value written until the completion of a subsequent indirect read operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 104 ...
Page 118
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X FTHRES[6] 0 FTHRES[5] 1 FTHRES[4] 1 FTHRES[3] 1 FTHRES[2] 1 FTHRES[1] 1 FTHRES[0] 1 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 105 ...
Page 119
... Note: For operation with T1 links and SYSCLK = 33 MHz, FTHRESH[6:0] should be set to ‘b0011111’. The default value of this register is inconsistent with that of the TCAS Framing Bit Threshold register 0x408. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 106 ...
Page 120
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH CHDIS 0 Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X DCHAN[6] 0 DCHAN[5] 0 DCHAN[4] 0 DCHAN[3] 0 DCHAN[2] 0 DCHAN[1] 0 DCHAN[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 107 ...
Page 121
... DCHAN[6:0]. When CHDIS is set high, the channel selected by DCHAN[6:0] is disabled. Data in timeslots associated with the specified channel is ignored. When CHDIS is set low, the channel specified by DCHAN[6:0] operates normally. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 108 ...
Page 122
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X BSYNC CEN 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 109 ...
Page 123
... When BSYNC is set low, gaps in RCLK[0] carry no special significance. BSYNC is ignore when CEN is set high. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 110 ...
Page 124
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X BSYNC CEN 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 111 ...
Page 125
... When BSYNC is set low, gaps in RCLK[n] carry no special significance. BSYNC is ignore when CEN is set high. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 112 ...
Page 126
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused CEN 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 113 ...
Page 127
... Link data is present at time-slots ignored when CEN is set low. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 114 ...
Page 128
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused CEN 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 115 ...
Page 129
... RCLK[n] after an extended quiescent period is considered to be the most significant bit of time-slot 1. Link data is present at time-slots ignored when CEN is set low. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 116 ...
Page 130
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH BUSY X CRWB 0 Unused X Unused X Unused X Unused X Unused X Unused X Unused X CHAN[6] 0 CHAN[5] 0 CHAN[4] 0 CHAN[3] 0 CHAN[2] 0 CHAN[1] 0 CHAN[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 117 ...
Page 131
... RHDL Indirect Channel Data #1 and #2 registers or to determine when a new indirect write operation may commence. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 118 ...
Page 132
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH PROV 0 CRC[1] 0 CRC[0] 0 STRIP 0 DELIN 0 TAVAIL X Unused X FPTR[8] X FPTR[7] X FPTR[6] X FPTR[5] X FPTR[4] X FPTR[3] X FPTR[2] X FPTR[1] X FPTR[0] X PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 119 ...
Page 133
... Table 18 – CRC[1:0] Settings CRC[ PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 CRC[0] Operation 0 No Verification 1 CRC-CCITT PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 120 ...
Page 134
... HDLC processor will ignore data on the channel specified by CHAN[6:0]. PROV reflects the value written until the completion of a subsequent indirect channel read operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 CRC[0] Operation 0 CRC-32 1 Reserved PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 121 ...
Page 135
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH 7BIT 0 PRIORITY 0 INVERT 0 Unused X Unused X Unused X OFFSET[1] 0 OFFSET[0] 0 Unused X Unused X Unused X Unused[ X Unused X XFER[2] X XFER[1] 0 XFER[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 122 ...
Page 136
... When 7BIT is set low, the entire receive data stream is processed. 7BIT reflects the value written until the completion of a subsequent indirect channel read operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 123 ...
Page 137
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH BUSY X BRWB X Unused X Unused X Unused X Unused X Unused X BLOCK[8] X BLOCK[7] X BLOCK[6] X BLOCK[5] X BLOCK[4] X BLOCK[3] X BLOCK[2] X BLOCK[1] X BLOCK[0] X PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 124 ...
Page 138
... RHDL Indirect Block Data register or to determine when a new indirect write operation may commence. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 125 ...
Page 139
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH Unused X Unused X Unused X Unused X Unused X Unused X Unused X BPTR[8] 0 BPTR[7] 0 BPTR[6] 0 BPTR[5] 0 BPTR[4] 0 BPTR[3] 0 BPTR[2] 0 BPTR[1] 0 BPTR[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 126 ...
Page 140
... BPTR[8:0] reflects the value written until the completion of a subsequent indirect block read operation. When provisioning a channel FIFO, all blocks pointers must be re-written to properly initialize the FIFO. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 127 ...
Page 141
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH Unused X Unused X Unused X Unused X Unused X Unused X LENCHK 0 TSTD 0 Unused X Unused X Unused X Unused X Unused X Reserved[2] 1 Reserved[1] 1 Reserved[0] 1 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 128 ...
Page 142
... MAX[15:0]. When LENCHK is set low, receive packets are not checked for maximum size and MAX[15:0] must be set to 'hFFFF. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 129 ...
Page 143
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH MAX[15] 1 MAX[14] 1 MAX[13] 1 MAX[12] 1 MAX[11] 1 MAX[10] 1 MAX[9] 1 MAX[8] 1 MAX[7] 1 MAX[6] 1 MAX[5] 1 MAX[4] 1 MAX[3] 1 MAX[2] 1 MAX[1] 1 MAX[0] 1 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 130 ...
Page 144
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH Unused X Unused X Unused X Unused X RPQ_SFN[1] 0 RPQ_SFN[0] 0 RPQ_LFN[1] 0 RPQ_LFN[0] 0 RPQ_RDYN[2] 0 RPQ_RDYN[1] 0 RPQ_RDYN[0] 0 RAWMAX[1] 1 RAWMAX[0] 1 SCACHE 1 LCACHE 1 ENABLE 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 131 ...
Page 145
... Large Buffer Free Queue to the RMACs internal cache before the RPDR Large Buffer Free Queue interrupt (RPQLFI) is asserted, as follows: PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE RPDRs 000 1 001 4 010 6 011 8 100 16 101 32 110 Reserved 111 Reserved PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 132 ...
Page 146
... Queue interrupt (RPQSFI) is asserted, as follows: Table 21 – RPQ_SFN[1:0] Settings RPQ_SFN[1:0] PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE Reads Reserved No of Reads Reserved PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 133 ...
Page 147
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH BUSY X RWB 0 Unused X Unused X Unused X Unused X Unused X Unused X PROV 1 CHAN[6] 0 CHAN[5] 0 CHAN[4] 0 CHAN[3] 0 CHAN[2] 0 CHAN[1] 0 CHAN[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 134 ...
Page 148
... At which point, BUSY will be set low. This register should be polled to determine when data from an indirect read operation is available or to determine when a new indirect write operation may commence. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 135 ...
Page 149
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH RPDTB[15] 0 RPDTB[14] 0 RPDTB[13] 0 RPDTB[12] 0 RPDTB[11] 0 RPDTB[10] 0 RPDTB[9] 0 RPDTB[8] 0 RPDTB[7] 0 RPDTB[6] 0 RPDTB[5] 0 RPDTB[4] 0 RPDTB[3] 0 RPDTB[2] 0 RPDTB[1] 0 RPDTB[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 136 ...
Page 150
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH RPDTB[31] 0 RPDTB[30] 0 RPDTB[29] 0 RPDTB[28] 0 RPDTB[27] 0 RPDTB[26] 0 RPDTB[25] 0 RPDTB[24] 0 RPDTB[23] 0 RPDTB[22] 0 RPDTB[21] 0 RPDTB[20] 0 RPDTB[19] 0 RPDTB[18] 0 RPDTB[17] 0 RPDTB[16] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 137 ...
Page 151
... Receive Packet Descriptor Table Base (RPDTB[31:4]). The table must byte boundary and thus the least significant four bits must be written to logic zero. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 138 ...
Page 152
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH RQB[15] 0 RQB[14] 0 RQB[13] 0 RQB[12] 0 RQB[11] 0 RQB[10] 0 RQB[9] 0 RQB[8] 0 RQB[7] 0 RQB[6] 0 RQB[5] 0 RQB[4] 0 RQB[3] 0 RQB[2] 0 RQB[1] 0 RQB[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 139 ...
Page 153
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH RQB[31] 0 RQB[30] 0 RQB[29] 0 RQB[28] 0 RQB[27] 0 RQB[26] 0 RQB[25] 0 RQB[24] 0 RQB[23] 0 RQB[22] 0 RQB[21] 0 RQB[20] 0 RQB[19] 0 RQB[18] 0 RQB[17] 0 RQB[16] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 140 ...
Page 154
... The base address must be dword aligned and thus the least significant two bits must be written to logic zero. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 141 ...
Page 155
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH RPDRLFQS[15] 0 RPDRLFQS[14] 0 RPDRLFQS[13] 0 RPDRLFQS[12] 0 RPDRLFQS[11] 0 RPDRLFQS[10] 0 RPDRLFQS[9] 0 RPDRLFQS[8] 0 RPDRLFQS[7] 0 RPDRLFQS[6] 0 RPDRLFQS[5] 0 RPDRLFQS[4] 0 RPDRLFQS[3] 0 RPDRLFQS[2] 0 RPDRLFQS[1] 0 RPDRLFQS[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 142 ...
Page 156
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH RPDRLFQW[15] 0 RPDRLFQW[14] 0 RPDRLFQW[13] 0 RPDRLFQW[12] 0 RPDRLFQW[11] 0 RPDRLFQW[10] 0 RPDRLFQW[9] 0 RPDRLFQW[8] 0 RPDRLFQW[7] 0 RPDRLFQW[6] 0 RPDRLFQW[5] 0 RPDRLFQW[4] 0 RPDRLFQW[3] 0 RPDRLFQW[2] 0 RPDRLFQW[1] 0 RPDRLFQW[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 143 ...
Page 157
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH RPDRLFQR[15] 0 RPDRLFQR[14] 0 RPDRLFQR[13] 0 RPDRLFQR[12] 0 RPDRLFQR[11] 0 RPDRLFQR[10] 0 RPDRLFQR[9] 0 RPDRLFQR[8] 0 RPDRLFQR[7] 0 RPDRLFQR[6] 0 RPDRLFQR[5] 0 RPDRLFQR[4] 0 RPDRLFQR[3] 0 RPDRLFQR[2] 0 RPDRLFQR[1] 0 RPDRLFQR[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 144 ...
Page 158
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH RPDRLFQE[15] 0 RPDRLFQE[14] 0 RPDRLFQE[13] 0 RPDRLFQE[12] 0 RPDRLFQE[11] 0 RPDRLFQE[10] 0 RPDRLFQE[9] 0 RPDRLFQE[8] 0 RPDRLFQE[7] 0 RPDRLFQE[6] 0 RPDRLFQE[5] 0 RPDRLFQE[4] 0 RPDRLFQE[3] 0 RPDRLFQE[2] 0 RPDRLFQE[1] 0 RPDRLFQE[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 145 ...
Page 159
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH RPDRSFQS[15] 0 RPDRSFQS[14] 0 RPDRSFQS[13] 0 RPDRSFQS[12] 0 RPDRSFQS[11] 0 RPDRSFQS[10] 0 RPDRSFQS[9] 0 RPDRSFQS[8] 0 RPDRSFQS[7] 0 RPDRSFQS[6] 0 RPDRSFQS[5] 0 RPDRSFQS[4] 0 RPDRSFQS[3] 0 RPDRSFQS[2] 0 RPDRSFQS[1] 0 RPDRSFQS[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 146 ...
Page 160
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH RPDRSFQW[15] 0 RPDRSFQW[14] 0 RPDRSFQW[13] 0 RPDRSFQW[12] 0 RPDRSFQW[11] 0 RPDRSFQW[10] 0 RPDRSFQW[9] 0 RPDRSFQW[8] 0 RPDRSFQW[7] 0 RPDRSFQW[6] 0 RPDRSFQW[5] 0 RPDRSFQW[4] 0 RPDRSFQW[3] 0 RPDRSFQW[2] 0 RPDRSFQW[1] 0 RPDRSFQW[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 147 ...
Page 161
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH RPDRSFQR[15] 0 RPDRSFQR[14] 0 RPDRSFQR[13] 0 RPDRSFQR[12] 0 RPDRSFQR[11] 0 RPDRSFQR[10] 0 RPDRSFQR[9] 0 RPDRSFQR[8] 0 RPDRSFQR[7] 0 RPDRSFQR[6] 0 RPDRSFQR[5] 0 RPDRSFQR[4] 0 RPDRSFQR[3] 0 RPDRSFQR[2] 0 RPDRSFQR[1] 0 RPDRSFQR[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 148 ...
Page 162
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH RPDRSFQE[15] 0 RPDRSFQE[14] 0 RPDRSFQE[13] 0 RPDRSFQE[12] 0 RPDRSFQE[11] 0 RPDRSFQE[10] 0 RPDRSFQE[9] 0 RPDRSFQE[8] 0 RPDRSFQE[7] 0 RPDRSFQE[6] 0 RPDRSFQE[5] 0 RPDRSFQE[4] 0 RPDRSFQE[3] 0 RPDRSFQE[2] 0 RPDRSFQE[1] 0 RPDRSFQE[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 149 ...
Page 163
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH RPDRRQS[15] 0 RPDRRQS[14] 0 RPDRRQS[13] 0 RPDRRQS[12] 0 RPDRRQS[11] 0 RPDRRQS[10] 0 RPDRRQS[9] 0 RPDRRQS[8] 0 RPDRRQS[7] 0 RPDRRQS[6] 0 RPDRRQS[5] 0 RPDRRQS[4] 0 RPDRRQS[3] 0 RPDRRQS[2] 0 RPDRRQS[1] 0 RPDRRQS[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 150 ...
Page 164
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH RPDRRQW[15] 0 RPDRRQW[14] 0 RPDRRQW[13] 0 RPDRRQW[12] 0 RPDRRQW[11] 0 RPDRRQW[10] 0 RPDRRQW[9] 0 RPDRRQW[8] 0 RPDRRQW[7] 0 RPDRRQW[6] 0 RPDRRQW[5] 0 RPDRRQW[4] 0 RPDRRQW[3] 0 RPDRRQW[2] 0 RPDRRQW[1] 0 RPDRRQW[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 151 ...
Page 165
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH RPDRRQR[15] 0 RPDRRQR[14] 0 RPDRRQR[13] 0 RPDRRQR[12] 0 RPDRRQR[11] 0 RPDRRQR[10] 0 RPDRRQR[9] 0 RPDRRQR[8] 0 RPDRRQR[7] 0 RPDRRQR[6] 0 RPDRRQR[5] 0 RPDRRQR[4] 0 RPDRRQR[3] 0 RPDRRQR[2] 0 RPDRRQR[1] 0 RPDRRQR[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 152 ...
Page 166
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH RPDRRQE[15] 0 RPDRRQE[14] 0 RPDRRQE[13] 0 RPDRRQE[12] 0 RPDRRQE[11] 0 RPDRRQE[10] 0 RPDRRQE[9] 0 RPDRRQE[8] 0 RPDRRQE[7] 0 RPDRRQE[6] 0 RPDRRQE[5] 0 RPDRRQE[4] 0 RPDRRQE[3] 0 RPDRRQE[2] 0 RPDRRQE[1] 0 RPDRRQE[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 153 ...
Page 167
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X TDQ_FRN[1] 0 TDQ_FRN[0] 0 TDQ_RDYN[2] 0 TDQ_RDYN[1] 0 TDQ_RDYN[0] 0 CACHE 1 ENABLE 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 154 ...
Page 168
... Table 23 – TDQ_FRN[1:0] Settings TDQ_FRN[1:0] PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE TDRs 000 1 001 4 010 6 011 8 100 16 101 32 110 Reserved 111 Reserved No of Reads Reserved PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 155 ...
Page 169
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH BUSY X RWB 0 Unused X Unused X Unused X Unused X Unused X Unused X PROV 0 CHAN[6] 0 CHAN[5] 0 CHAN[4] 0 CHAN[3] 0 CHAN[2] 0 CHAN[1] 0 CHAN[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 156 ...
Page 170
... At which point, BUSY will be set low. This register should be polled to determine when data from an indirect read operation is available or to determine when a new indirect write operation may commence. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 157 ...
Page 171
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH TDTB[15] 0 TDTB[14] 0 TDTB[13] 0 TDTB[12] 0 TDTB[11] 0 TDTB[10] 0 TDTB[9] 0 TDTB[8] 0 TDTB[7] 0 TDTB[6] 0 TDTB[5] 0 TDTB[4] 0 TDTB[3] 0 TDTB[2] 0 TDTB[1] 0 TDTB[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 158 ...
Page 172
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH TDTB[31] 0 TDTB[30] 0 TDTB[29] 0 TDTB[28] 0 TDTB[27] 0 TDTB[26] 0 TDTB[25] 0 TDTB[24] 0 TDTB[23] 0 TDTB[22] 0 TDTB[21] 0 TDTB[20] 0 TDTB[19] 0 TDTB[18] 0 TDTB[17] 0 TDTB[16] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 159 ...
Page 173
... Transmit Descriptor Table Base (TDTB[31:4]). The table must byte boundary and thus the least significant four bits must be written to logic zero. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 160 ...
Page 174
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH TQB[15] 0 TQB[14] 0 TQB[13] 0 TQB[12] 0 TQB[11] 0 TQB[10] 0 TQB[9] 0 TQB[8] 0 TQB[7] 0 TQB[6] 0 TQB[5] 0 TQB[4] 0 TQB[3] 0 TQB[2] 0 TQB[1] 0 TQB[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 161 ...
Page 175
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH TQB[31] 0 TQB[30] 0 TQB[29] 0 TQB[28] 0 TQB[27] 0 TQB[26] 0 TQB[25] 0 TQB[24] 0 TQB[23] 0 TQB[22] 0 TQB[21] 0 TQB[20] 0 TQB[19] 0 TQB[18] 0 TQB[17] 0 TQB[16] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 162 ...
Page 176
... The base address must be dword aligned and thus the least significant two bits must be written to logic zero. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 163 ...
Page 177
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH TDRFQS[15] 0 TDRFQS[14] 0 TDRFQS[13] 0 TDRFQS[12] 0 TDRFQS[11] 0 TDRFQS[10] 0 TDRFQS[9] 0 TDRFQS[8] 0 TDRFQS[7] 0 TDRFQS[6] 0 TDRFQS[5] 0 TDRFQS[4] 0 TDRFQS[3] 0 TDRFQS[2] 0 TDRFQS[1] 0 TDRFQS[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 164 ...
Page 178
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH TDRFQW[15] 0 TDRFQW[14] 0 TDRFQW[13] 0 TDRFQW[12] 0 TDRFQW[11] 0 TDRFQW[10] 0 TDRFQW[9] 0 TDRFQW[8] 0 TDRFQW[7] 0 TDRFQW[6] 0 TDRFQW[5] 0 TDRFQW[4] 0 TDRFQW[3] 0 TDRFQW[2] 0 TDRFQW[1] 0 TDRFQW[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 165 ...
Page 179
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH TDRFQR[15] 0 TDRFQR[14] 0 TDRFQR[13] 0 TDRFQR[12] 0 TDRFQR[11] 0 TDRFQR[10] 0 TDRFQR[9] 0 TDRFQR[8] 0 TDRFQR[7] 0 TDRFQR[6] 0 TDRFQR[5] 0 TDRFQR[4] 0 TDRFQR[3] 0 TDRFQR[2] 0 TDRFQR[1] 0 TDRFQR[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 166 ...
Page 180
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH TDRFQE[15] 0 TDRFQE[14] 0 TDRFQE[13] 0 TDRFQE[12] 0 TDRFQE[11] 0 TDRFQE[10] 0 TDRFQE[9] 0 TDRFQE[8] 0 TDRFQE[7] 0 TDRFQE[6] 0 TDRFQE[5] 0 TDRFQE[4] 0 TDRFQE[3] 0 TDRFQE[2] 0 TDRFQE[1] 0 TDRFQE[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 167 ...
Page 181
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH TDRRQS[15] 0 TDRRQS[14] 0 TDRRQS[13] 0 TDRRQS[12] 0 TDRRQS[11] 0 TDRRQS[10] 0 TDRRQS[9] 0 TDRRQS[8] 0 TDRRQS[7] 0 TDRRQS[6] 0 TDRRQS[5] 0 TDRRQS[4] 0 TDRRQS[3] 0 TDRRQS[2] 0 TDRRQS[1] 0 TDRRQS[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 168 ...
Page 182
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH TDRRQW[15] 0 TDRRQW[14] 0 TDRRQW[13] 0 TDRRQW[12] 0 TDRRQW[11] 0 TDRRQW[10] 0 TDRRQW[9] 0 TDRRQW[8] 0 TDRRQW[7] 0 TDRRQW[6] 0 TDRRQW[5] 0 TDRRQW[4] 0 TDRRQW[3] 0 TDRRQW[2] 0 TDRRQW[1] 0 TDRRQW[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 169 ...
Page 183
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH TDRRQR[15] 0 TDRRQR[14] 0 TDRRQR[13] 0 TDRRQR[12] 0 TDRRQR[11] 0 TDRRQR[10] 0 TDRRQR[9] 0 TDRRQR[8] 0 TDRRQR[7] 0 TDRRQR[6] 0 TDRRQR[5] 0 TDRRQR[4] 0 TDRRQR[3] 0 TDRRQR[2] 0 TDRRQR[1] 0 TDRRQR[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 170 ...
Page 184
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH TDRRQE[15] 0 TDRRQE[14] 0 TDRRQE[13] 0 TDRRQE[12] 0 TDRRQE[11] 0 TDRRQE[10] 0 TDRRQE[9] 0 TDRRQE[8] 0 TDRRQE[7] 0 TDRRQE[6] 0 TDRRQE[5] 0 TDRRQE[4] 0 TDRRQE[3] 0 TDRRQE[2] 0 TDRRQE[1] 0 TDRRQE[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 171 ...
Page 185
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH BUSY X CRWB 0 Unused X Unused X Unused X Unused X Unused X Unused X Unused X CHAN[6] 0 CHAN[5] 0 CHAN[4] 0 CHAN[3] 0 CHAN[2] 0 CHAN[1] 0 CHAN[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 172 ...
Page 186
... THDL Indirect Channel Data #1, #2 and #3 registers or to determine when a new indirect write operation may commence. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 173 ...
Page 187
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH PROV 0 CRC[1] 0 CRC[0] 0 IDLE 0 DELIN 0 Unused X Unused X FPTR[8] 0 FPTR[7] 0 FPTR[6] 0 FPTR[5] 0 FPTR[4] 0 FPTR[3] 0 FPTR[2] 0 FPTR[1] 0 FPTR[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 174 ...
Page 188
... TCAS block. When PROV is set low, the PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 CRC[0] Operation 0 No CRC 1 CRC-CCITT 0 CRC-32 1 Reserved PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 175 ...
Page 189
... HDLC processor will ignore requests from the TCAS block. PROV reflects the value written until the completion of a subsequent indirect channel read operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 176 ...
Page 190
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH 7BIT 0 PRIORITYB 0 INVERT 0 DFCS 0 Unused X Unused X Unused X FLEN[8] 0 FLEN[7] 0 FLEN[6] 0 FLEN[5] 0 FLEN[4] 0 FLEN[3] 0 FLEN[2] 0 FLEN[1] 0 FLEN[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 177 ...
Page 191
... BIT8 register bit. When 7BIT is set low, the entire octet contains valid data and BIT8 is ignored. 7BIT reflects the value written until the completion of a subsequent indirect channel read operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 178 ...
Page 192
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH TRANS 0 Unused X Unused X Unused X LEVEL[3] 0 LEVEL[2] 0 LEVEL[1] 0 LEVEL[0] 0 FLAG[2] 0 FLAG[1] 0 FLAG[0] 0 Unused[ X Unused X XFER[2] 0 XFER[1] 0 XFER[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 179 ...
Page 193
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Minimum Number of Flag/Idle Bytes 1 flag / 0 Idle byte 2 flags / 0 idle byte 4 flags / 2 idle bytes 8 flags / 6 idle bytes 16 flags / 14 idle bytes 32 flags / 30 idle bytes 64 flags / 62 idle bytes 128 flags / 126 idle bytes PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 180 ...
Page 194
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Expedite Start Transmission Level (TRANS=0) 2 Blocks 1 Block (16 bytes free) 3 Blocks 2 Blocks (32 bytes free) 4 Blocks 3 Blocks (48 bytes free) PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER Start Transmission Level (TRANS=1) 1 Block (16 bytes free) 1 Block (16 bytes free) 2 Blocks (32 bytes free) 181 ...
Page 195
... Kbytes free) 192 Blocks 128 Blocks (2 Kbytes free) 256 Blocks 192 Blocks (3 Kbytes free) 384 Blocks 256 Blocks (4 Kbytes free) PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER Start Transmission Level (TRANS=1) 3 Blocks (48 bytes free) 4 Blocks (64 bytes free) 6 Blocks (96 bytes free) ...
Page 196
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH BUSY X BRWB 0 Unused X Unused X Unused X Unused X Unused X BLOCK[8] 0 BLOCK[7] 0 BLOCK[6] 0 BLOCK[5] 0 BLOCK[4] 0 BLOCK[3] 0 BLOCK[2] 0 BLOCK[1] 0 BLOCK[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 183 ...
Page 197
... THDL Indirect Block Data register or to determine when a new indirect write operation may commence. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 184 ...
Page 198
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH Reserved 0 Unused X Unused X Unused X Unused X Unused X Unused X BPTR[8] 0 BPTR[7] 0 BPTR[6] 0 BPTR[5] 0 BPTR[4] 0 BPTR[3] 0 BPTR[2] 0 BPTR[1] 0 BPTR[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 185 ...
Page 199
... When provisioning a channel FIFO, all blocks pointers must be re-written to properly initialize the FIFO. Reserved: The reserved bit (Reserved) must be set low for correct operation of the FREEDM-8 device. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 186 ...
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... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 4 Function Default Unused XXXXH Unused X Unused X Unused X Unused X Unused X Unused X BIT8 0 TSTD 0 BURSTEN 0 Unused X Unused X Unused X Unused X BURST[2] 0 BURST[1] 0 BURST[0] 0 PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER 187 ...