STM32F407IGH6 STMicroelectronics, STM32F407IGH6 Datasheet - Page 23

• Manufacturer Part Number: STM32F407IGH6
• Description: Microcontrollers (MCU) ARM M4 1024 FLASH 168 Mhz 192kB SRAM
• Manufacturer: STMicroelectronics

Specifications of STM32F407IGH6

• Core: ARM Cortex M4
• Processor Series: STM32F4
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 168 MHz
• Program Memory Size: 1024 KB
• Data Ram Size: 192 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 140
• Number Of Timers: 10
• Operating Supply Voltage: 1.7 V to 3.6 V
• Package / Case: UFBGA-176
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Interface Type: CAN, I2C, I2S, SPI, UART
• Program Memory Type: Flash
• Lead Free Status / Rohs Status: Details

STM32F405xx, STM32F407xx
2.2.15
2.2.16
Power supply supervisor
The power supply supervisor is enabled by holding PDR_ON high.
The device has an integrated power-on reset (POR) / power-down reset (PDR) circuitry
coupled with a Brownout reset (BOR) circuitry. At power-on, BOR is always active, and
ensures proper operation starting from 1.8 V. After the 1.8 V BOR threshold level is reached,
the option byte loading process starts, either to confirm or modify default thresholds, or to
disable BOR permanently. Three BOR thresholds are available through option bytes.
The device remains in reset mode when V
V
The device also features an embedded programmable voltage detector (PVD) that monitors
the V
generated when V
than the V
message and/or put the MCU into a safe state. The PVD is enabled by software.
All packages, except for the LQFP64 and LQFP100, have an internal reset controlled
through the PDR_ON signal.
Voltage regulator
The regulator has eight operating modes:
●
●
●
●
Regulator ON
●
BOR
Regulator ON/internal reset ON
–
–
–
Regulator ON/internal reset OFF
–
–
–
Regulator OFF/internal reset ON
Regulator OFF/internal reset OFF
Regulator ON/internal reset ON
The regulator ON/internal reset ON mode is always enabled on LQFP64 and LQFP100
package.
On LQFP144 package, this mode is activated by setting PDR_ON to V
On UFBGA176 package, the internal regulator must be activated by connecting
BYPASS_REG to V
On LQFP176 packages, the internal reset must be activated by connecting PDR_ON to
V
DD
, without the need for an external reset circuit.
DD
/V
.
Main regulator mode (MR)
Low power regulator (LPR)
Power-down
Main regulator mode (MR)
Low power regulator (LPR)
Power-down
DDA
PVD
power supply and compares it to the V
threshold. The interrupt service routine can then generate a warning
DD
/V
DDA
SS,
drops below the V
and PDR_ON to V
Doc ID 022152 Rev 2
DD
PVD
is below a specified threshold, V
DD
.
threshold and/or when V
PVD
threshold. An interrupt can be
DD
DD
/V
.
POR/PDR
DDA
Description
is higher
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or