MPC5200CVR400B Freescale Semiconductor, MPC5200CVR400B Datasheet - Page 75

IC MPU 32BIT 400MHZ 272-PBGA

MPC5200CVR400B

Manufacturer Part Number
MPC5200CVR400B
Description
IC MPU 32BIT 400MHZ 272-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC5200CVR400B

Processor Type
MPC52xx PowerPC 32-Bit
Speed
400MHz
Voltage
1.5V
Mounting Type
Surface Mount
Package / Case
272-PBGA
Processor Series
MPC52xx
Core
e300
Development Tools By Supplier
MEDIA5200KIT1E
Maximum Clock Frequency
400 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
I/o Voltage
2.5 V, 3.3 V
Minimum Operating Temperature
- 40 C
Core Size
32 Bit
No. Of I/o's
56
Ram Memory Size
16KB
Cpu Speed
400MHz
No. Of Timers
8
Embedded Interface Type
CAN, I2C, SCI, SPI
No. Of Pwm Channels
8
Digital Ic Case Style
TEPBGA
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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5.4.1.2
The wiring of the JTAG_TRST depends on the existence of a board-related debug interface (see
below).
Normally this interface is implemented, using a COP (common on-chip processor) connector. The COP
allows a remote computer system (typically, a PC with dedicated hardware and debugging software) to
access and control the internal operations of the MPC5200.
5.4.2
There are two possibilities to connect the JTAG interface: using it with a COP connector and without a
COP connector.
5.4.2.1
The MPC5200 functional pin interface and internal logic provides access to the embedded G2_LE
processor core through the Freescale (formerly Motorola) standard COP/BDM interface.
the COP/BDM interface signals. The pin order shown reflects only the COP/BDM connector order.
Freescale Semiconductor
required assertion of JTAG_TRST
JTAG_TRST
PORRESET
G2_LE COP/BDM Interface
Connecting JTAG_TRST
Boards interfacing the JTAG port via a COP connector
Pin #
BDM
16
15
14
13
12
11
10
9
TEST_SEL_0
JTAG_TMS
MPC5200
HRESET
SRESET
I/O Pin
Figure 54. PORRESET vs. JTAG_TRST
Table 53. COP/BDM Interface Signals
Connector
MPC5200 Data Sheet, Rev. 4
ckstp_out
hreset
sreset
BDM
GND
GND
KEY
N/C
tms
PullUp/Down
100k Pull-Up
Internal
optional assertion of JTAG_TRST
PullUp/Down
10k Pull-Up
10k Pull-Up
10k Pull-Up
External
System Design Information
I/O
O
O
O
I
Table 53
1
Table 53
gives
75

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