MT46V32M16D2TH-7L Micron Technology Inc, MT46V32M16D2TH-7L Datasheet - Page 31

MT46V32M16D2TH-7L

Manufacturer Part Number
MT46V32M16D2TH-7L
Description
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet

Specifications of MT46V32M16D2TH-7L

Organization
32Mx16
Density
512Mb
Address Bus
15b
Access Time (max)
750ps
Maximum Clock Rate
266MHz
Operating Supply Voltage (typ)
2.5V
Package Type
TSOP
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Pin Count
66
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant
512Mb: x4, x8, x16 DDR SDRAM
512Mx4x8x16DDR_A.p65 – Rev. A; Pub 10/00
COMMAND
ADDRESS
t
t
t
DQSS (NOM)
DQSS (MIN)
DQSS (MAX)
NOTE: 1. DI b = data-in for column b.
DQS
DQS
DQS
CK#
DM
DM
DM
DQ
DQ
DQ
CK
2. Three subsequent elements of data-in are applied in the programmed order following DI b.
3. An uninterrupted burst of 4 is shown.
4. t WTR is referenced from the first positive CK edge after the last data-in pair.
5. The READ and WRITE commands are to the same bank. However, the READ and WRITE commands may be
6. A10 is LOW with the WRITE command (auto precharge is disabled).
to different devices, in which case t WTR is not required and the READ command could be applied earlier.
Bank a,
WRITE
Col b
T0
t
t
t
DQSS
DQSS
DQSS
DI
b
NOP
T1
DI
b
WRITE to READ – Uninterrupting
DI
b
T1n
NOP
T2
Figure 19
T2n
31
T3
NOP
t
WTR
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Bank a,
READ
Col n
T4
DON’T CARE
512Mb: x4, x8, x16
CL = 2
CL = 2
CL = 2
T5
NOP
DDR SDRAM
TRANSITIONING DATA
©2000, Micron Technology, Inc.
ADVANCE
T6
NOP
DI
DI
DI
n
n
n
T6n

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