MT47H16M16BG-3 Micron Technology Inc, MT47H16M16BG-3 Datasheet - Page 116

• Manufacturer Part Number: MT47H16M16BG-3
• Manufacturer: Micron Technology Inc

Specifications of MT47H16M16BG-3

• Lead Free Status / Rohs Status: Compliant

Figure 71: WRITE-to-Power-Down or Self Refresh Entry
Figure 72: WRITE with Auto Precharge-to-Power-Down or Self Refresh Entry
PDF: 09005aef8117c187
256MbDDR2.pdf - Rev. M 7/09 EN
DQS, DQS#
DQS, DQS#
Command
Command
Address
Address
CK#
CKE
A10
CK#
CKE
A10
DQ
DQ
CK
CK
WRITE
Valid
Valid
WRITE
T0
T0
Notes:
Note:
NOP
NOP
T1
T1
WL = 3
WL = 3
1. Power-down or self refresh entry may occur after the WRITE burst completes.
1. Internal PRECHARGE occurs at Ta0 when WR has completed; power-down entry may oc-
2. WR is programmed through MR9–MR11 and represents (
cur 1 x
to next integer
NOP
NOP
T2
T2
t
CK later at Ta1, prior to
NOP
t
DO
NOP
DO
CK.
T3
T3
DO
DO
116
Valid
Valid
DO
DO
T4
T4
t
RP being satisfied.
DO
DO
Indicates a break in
time scale
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Valid
Valid
T5
T5
256Mb: x4, x8, x16 DDR2 SDRAM
WR 2
Valid 1
Valid
t WTR
Ta0
T6
Transitioning Data
t
self refresh entry 1
self refresh entry
Power-down or
WR [MIN] ns/
Power-down or
Transitioning Data
Power-Down Mode
©2003 Micron Technology, Inc. All rights reserved.
NOP 1
NOP
Ta1
T7
t
CK) rounded up
t CKE (MIN)
t CKE (MIN)
Ta2
T8
Don’t Care
Don’t Care